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Static random access memory structure

A static random access and memory technology, which is applied in the semiconductor field, can solve the problems of large circuit area and increased chip cost, and achieve the effects of improving integration, reducing occupied area, and reducing manufacturing costs

Pending Publication Date: 2022-03-18
FUDAN UNIV +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

In practical applications, SRAM occupies a large circuit area, and the low integration level will significantly increase the cost of the chip

Method used

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Embodiment Construction

[0026] In order to make the purpose, technical solutions and advantages of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the accompanying drawings of the present invention. Obviously, the described embodiments are part of the present invention Examples, not all examples. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without creative efforts fall within the protection scope of the present invention. Unless otherwise defined, the technical terms or scientific terms used herein shall have the usual meanings understood by those skilled in the art to which the present invention belongs. As used herein, "comprising" and similar words mean that the elements or items appearing before the word include the elements or items listed after the word and their equivalents, without excluding other el...

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Abstract

The invention provides a static random access memory structure which comprises a plurality of transistor units distributed in an array mode, and the transistor units in the same row are sequentially arranged in the first direction. The transistor unit comprises a first transmission tube, a first common-gate complementary field effect transistor, a second common-gate complementary field effect transistor and a second transmission tube which are sequentially arranged along the first direction; the channel direction of the first transmission tube, the channel direction of the first common-gate complementary field effect transistor, the channel direction of the second common-gate complementary field effect transistor and the channel direction of the second transmission tube are parallel to the first direction; the second transmission tubes of the transistor units and the first transmission tubes of the adjacent transistor units in the first direction are stacked together to form a common-gate structure, so that the area occupied by the first transmission tubes and the second transmission tubes can be reduced, the circuit integration level is improved, and the manufacturing cost is reduced.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a static random access memory structure. Background technique [0002] A static random-access memory (Static Random-Access Memory, SRAM) is a type of random-access memory. A storage unit of an SRAM is generally composed of a pull-up transistor (PU), a pull-down transistor (PD) and a pass-gate transistor (PG). In practical applications, SRAM occupies a relatively large circuit area, and a low integration level will significantly increase chip costs. [0003] Therefore, it is necessary to provide a novel static random access memory structure to solve the above-mentioned problems existing in the prior art. Contents of the invention [0004] The purpose of the present invention is to provide a static random access memory structure, improve the integration degree of the circuit, and reduce the manufacturing cost. [0005] To achieve the above object, the static random acce...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L27/11H10B10/00
CPCH10B10/18H10B10/00
Inventor 丁荣正俞少峰朱小娜朱宝尹睿
Owner FUDAN UNIV
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