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Semiconductor packaging structure

A packaging structure, semiconductor technology

Pending Publication Date: 2022-04-01
ADVANCED SEMICON ENG INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

However, when the signal is transmitted from the substrate 1 to the redistribution layer 2, since the line width of the redistribution layer 2 is smaller than that of the substrate 1, serious signal transmission loss is caused, which is not conducive to high-speed signal transmission.

Method used

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  • Semiconductor packaging structure
  • Semiconductor packaging structure
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Embodiment Construction

[0030] The specific implementation manners of the present disclosure will be described below in conjunction with the accompanying drawings and examples. Those skilled in the art can easily understand the technical problems solved by the present disclosure and the technical effects produced through the contents recorded in this specification. It should be understood that the specific embodiments described here are only used to explain related inventions, rather than to limit the invention. In addition, for the convenience of description, only the parts related to the related invention are shown in the drawings.

[0031] It should be noted that the structures, proportions, sizes, etc. shown in the accompanying drawings of the specification are only used to match the content recorded in the specification for the understanding and reading of those skilled in the art, and are not intended to limit the implementation of the present disclosure. There are limited conditions, so it has...

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Abstract

According to the semiconductor packaging structure provided by the invention, in a circuit design between a RDL (Redistribution Layer) and a substrate, a signal circuit is maintained and reserved on the substrate, and a power supply / grounding circuit is designed on the RDL. Compared with a traditional fan-out substrate (FOSub) structure in which a part of signal circuits are designed in a rewiring layer with the line width smaller than that of the substrate, the signal circuit is maintained and reserved in the substrate with the line width larger than that of the rewiring layer to maintain high-speed signal layout, signal transmission loss is avoided, and therefore the integrity of signal transmission can be maintained.

Description

technical field [0001] The present disclosure relates to the technical field of semiconductors, and in particular to semiconductor packaging structures. Background technique [0002] Such as figure 1 In the traditional fan-out substrate (FOSub) structure shown, the line design between the redistribution layer 2 (Redistribution Layer, RDL) and the substrate 1 (Substrate) is usually to design the signal lines on the redistribution layer 2, power / ground ( Power / Ground) circuits are designed on substrate 1. However, when the signal is transmitted from the substrate 1 to the redistribution layer 2 , since the line width of the redistribution layer 2 is smaller than that of the substrate 1 , serious signal transmission loss is caused, which is not conducive to high-speed signal transmission. Contents of the invention [0003] The present disclosure provides a semiconductor package structure, including: [0004] a first line structure, including a signal line; [0005] A seco...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L23/498H01L23/528H01L23/31
CPCH01L2224/16225H01L2924/181H01L2924/19105H01L2924/00012
Inventor 郑宏祥
Owner ADVANCED SEMICON ENG INC