SoC chip simulation verification method, apparatus and device, and storage medium

Abstract

The invention discloses an SoC chip simulation verification method, device and equipment and a storage medium, and the method comprises the steps: in the simulation verification process of an SoC chip, executing a boot loader in a flash memory medium of the SoC chip to realize simulation verification operation before code relocation; after simulation verification operation before code relocation is completed, it is determined that a main memory of the SoC chip is initialized in the simulation verification operation process before code relocation, a boot loader is migrated into the main memory to achieve code relocation, the boot loader is executed in the main memory, and the SoC chip is subjected to code relocation. After the function of the data Cache corresponding to the main memory is enabled by executing the boot loader in the memory, other simulation verification operations after code relocation are realized based on the data Cache. Therefore, the time for simulating the boot loader can be shortened, the simulation verification speed of the SoC chip is improved, and the chip development efficiency of the SoC chip is improved.

Description

technical field [0001] The present invention relates to the technical field of chip testing, and more specifically, relates to a SoC chip simulation verification method, device, equipment and storage medium. Background technique [0002] SoC is a technology that integrates the key components of the system on a chip. It is a micro-miniature system; the composition of the SoC chip can include processors, caches, memories, digital IP cores, analog IP cores, etc. Software and hardware collaborative design and verification are SoC The key technology in the chip. An operating system runs on the SoC chip, currently the most commonly used is the embedded Linux system. When the SoC chip starts, it will first execute the bootloader program, and then call the operating system kernel kernel. [0003] For the system-level simulation verification of the SoC chip, in order to verify the correctness of the SoC startup more comprehensively, the bootloader program is usually put into the sim...

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Problems solved by technology

[0003] For the system-level simulation verification of the SoC chip, in order to verify the correctness of the SoC startup more comprehensively, the bootloader program is usually put into the simulation verification environment as a simulation stimulus for verification; The simulation verification of the chip is slow, which reduces the chip development efficiency of the SoC chip

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