Processing unit task scheduling method and device

A processing unit and task scheduling technology, applied in the directions of multi-program device, program startup/switching, resource allocation, etc., can solve the problems of underutilization of computing resources, unbalanced load, underutilization of dynamic performance parameters, etc., to avoid Local optimal scheduling, improving the effect of improving execution efficiency

Active Publication Date: 2022-04-15
苏州云途半导体有限公司
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Problems solved by technology

There are many algorithms for dynamic process scheduling. Generally, the shortest task execution time is used as the scheduling goal, and the earliest end process is scheduled first. This method is very effective in the case of a single processing unit, but when the number of processing units is large, it will lead to A large number of processes are concentrated on a certain processor, resulting in unbalanced load
On the other hand, no matter what kind of task scheduling method in the existing technology, it is executed in order, and the current very sufficient computing resour

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  • Processing unit task scheduling method and device
  • Processing unit task scheduling method and device

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[0028] The present invention will be described in detail below in conjunction with the accompanying drawings and specific embodiments, wherein the schematic embodiments and descriptions are only used to explain the present invention, but are not intended to limit the present invention.

[0029] as attached figure 1 As shown, the processing unit task scheduling device provided by the present invention includes a plurality of processing unit blocks, task scheduling units, and task scheduling queues; wherein: the processing unit block includes one or more processing units, and each processing unit is internally provided with a level storage space; the one or more processing units share level two storage space; multiple processing unit blocks share level three storage space; attached figure 1 In , the number of processing units and the number of processing unit blocks are examples;

[0030] Preferably: the tertiary storage space is Cache space or main memory space;

[0031] Pref...

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Abstract

The invention relates to a processing unit task scheduling method and device, and the method comprises the steps: judging whether a prediction assertion for an idle processing unit related to a scheduling opportunity exists or not when the scheduling opportunity arrives; during prediction assertion, obtaining a target task pair associated with the prediction assertion, and scheduling a secondary task in the target task pair to the idle processing unit for execution; the main task is scheduled to the first processing unit for execution after the prediction assertion is created. From the perspective of task demand condition estimation and hardware resource management, the fusion range of tasks and resources is expanded by constructing the target task pair, the balance between task demands and hardware resources is achieved on the basis of achieving good task sharing execution, and finally the task scheduling efficiency of the processing unit is improved.

Description

technical field [0001] The invention belongs to the technical field of integrated circuit design, and in particular relates to a processing unit task scheduling method and device. Background technique [0002] Microprocessor manufacturers are now embracing multi-processing unit technology one after another. Increasing the number of processing units in MPU technology opens up a new window for processor performance improvement. With the continuous increase of the number of processing units and the complexity of the structure of the processing units, improving the efficiency of task scheduling in a multi-processing unit system has become a new research hotspot. Due to the introduction of multi-processing units, the relationship between the processing nodes in the parallel system has been changed. In the traditional parallel system, each processing node in the system is equal, but in the parallel system based on multi-processing units, this pairing The equal relationship is co...

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Application Information

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IPC IPC(8): G06F9/48G06F9/50
CPCY02D10/00
Inventor 耿晓祥王建中刘静
Owner 苏州云途半导体有限公司
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