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A chip verification method, device, system, control server and medium

A technology for controlling a server and a verification method, applied in the field of devices, systems, chip verification methods, control servers and media, can solve the problems of wasting manpower, unable to cover the address range of the chip, and taking a long time to achieve the effect of reducing manpower

Active Publication Date: 2022-07-22
新华三半导体技术有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Because it takes a long time to traverse a large range of address space in the simulation platform, at present, a part of the address is generally selected manually for verification, which cannot fully cover the address range that the chip needs to access, and wastes a lot of manpower

Method used

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  • A chip verification method, device, system, control server and medium
  • A chip verification method, device, system, control server and medium
  • A chip verification method, device, system, control server and medium

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Embodiment Construction

[0071] The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, but not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art based on the present application fall within the protection scope of the present invention.

[0072] Different verification platforms may be used for the prototype verification of different modules of the chip and the entire chip system level. For example, the verification platform can be electronic design automation (Electronic design automation, EDA), simulation (emulation) or Field Programmable Gate Array (Field Programmable Gate Array). Array, FPGA). Among them, EDA is mainly used for module-level or small-system-level c...

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Abstract

Embodiments of the present application provide a chip verification method, device, system, control server, and medium, and relate to the technical field of testing. The technical solutions of the embodiments of the present application include: the control server determines the first MSID and the first offset value corresponding to the current address space to be verified, wherein each MSID corresponds to a segment of the address space of the chip to be verified, and the first offset value is used to represent The offset value of the starting address of the address space to be verified relative to the starting address of the address space corresponding to the first MSID. Then, a write operation command is sent to the chip to be verified, and a read operation command is sent to the chip to be verified. Then, the chip to be verified is verified based on the data to be written and the target data read from the chip to be verified. Then it returns to the step of determining the first MSID and the first offset value until the verification of all address spaces of the chip to be verified is completed. The embodiment of the present application can comprehensively verify the address range of the chip on the basis of saving manpower.

Description

technical field [0001] The present invention relates to the technical field of testing, in particular to a chip verification method, device, system, control server and medium. Background technique [0002] In the process of chip design, the verification of the prototype of the chip is an important link. Through the verification of the chip, problems in the chip design can be found before the chip is manufactured, which is beneficial to reduce the development cost. [0003] At present, the chip is mainly verified through the simulation platform, but the running frequency of the simulation platform is relatively slow. Assuming that a real chip takes one minute to perform an operation, it takes three or four thousand minutes for the chip in the emulation platform to perform the same operation. If the address space that the chip needs to access is large, in order to verify the chip on the emulation platform, it is necessary to traverse a wide range of address space, such as an ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F30/33
CPCG06F30/33
Inventor 李毅刘李玮玮彭赢
Owner 新华三半导体技术有限公司
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