Method and system for realizing large-point FFT or DFT based on small-point algorithm kernel
A technology with an algorithm core and a large number of points is applied in the field of signal test and measurement to achieve strong scalability and flexibility, reduce rigid requirements, and achieve the effect of simple structure
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[0030] The present invention will be described in detail below with reference to the accompanying drawings and examples.
[0031] Using FPGA-based, 65536-point FFT algorithm IP core to realize 65536*2-point FFT frequency domain analysis system such as figure 2 As shown, the system includes: an ADC chip with two serial and parallel acquisition outputs, an FPGA chip, a DDR chip and a host computer.
[0032] In this system, the ADC chip first collects the input single-channel analog voltage signal into a discrete digital signal, serially converts it into 2-channel signal and outputs it to the FPGA port; the FPGA calls the 65536-point FFT IP core and instantiates it into two parallel FFT modules; DDR A 65536*2 deep storage space is opened for each signal, and each digital signal input by the FPGA port is sequentially stored in the corresponding DDR storage space;
[0033] For the DDR storage space corresponding to each channel of data, each time 65536 points of data are stored, ...
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