Passive crystal frequency fine tuning circuit

Abstract

The invention provides a passive crystal frequency fine tuning circuit, which comprises a direct-current voltage regulation module, a capacitance fine tuning module, a passive crystal clock generation module and a link impedance optimization circuit, and is characterized in that the direct-current voltage regulation module is used for receiving an input signal, performing high-frequency filtering on the input signal and then outputting a direct-current signal; and the capacitance fine tuning module comprises a variable capacitance diode, and the variable capacitance diode receives the direct current signal output by the direct current voltage adjusting module and takes the direct current signal as reverse voltage to realize capacitance adjustment. According to the passive crystal output frequency fine tuning circuit provided by the scheme, the frequency can be changed by changing the amplitude of the direct current voltage or the duty ratio of the PWM signal frequency, adjusting the reverse voltage of the variable capacitance diode and changing the load capacitance value of the passive crystal, so that the problem that the frequency cannot be adjusted is solved.

Description

technical field [0001] The invention belongs to the technical field of clock circuits, and in particular relates to a passive crystal frequency fine-tuning circuit. Background technique [0002] With the rapid rise of big data, most of the modern circuit systems are digital circuits, and a large number of digital chips such as FPGA, CPU, and DSP are used in the circuit, and the operation of these chips requires system clock input. The chip then multiplies the system clock to various frequency values ​​through a phase-locked loop, which is used by each module circuit in the chip. [0003] The current system clock input solution is to use high-cost active crystal oscillators such as figure 1 As shown, directly output a fixed frequency value clock. There is also a fine-tuning oscillator circuit built using passive crystals and inverters, and the output frequency fine-tuning clock, such as figure 2 shown. [0004] The prior art has the following disadvantages: [0005] 1. ...

AI Technical Summary

Problems solved by technology

For example, although the frequency of a crystal oscillator or crystal is hundreds of KHz-tens of MHz, because of the semiconductor process, its rise time becomes steeper and its signal bandwidth becomes wider and wider. The first challenge faced in clock transmission is The impact of the waveform quality of the transmission channel, the common phenomenon is that there are ringing and overshoot on the rising and falling edges, which will generate high-frequency parasitic oscillation, radiation and noise, etc.

At the same time, the work difference between PCB board making and layout routing will also cause the above problems

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