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Method and apparatus for loading data in single instruction multi-thread computing system

A computing system, multi-threading technology, applied in the field of electronics, to achieve the effect of improving efficiency

Active Publication Date: 2022-05-17
HEXAFLAKE (NANJING) INFORMATION TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, regular load instructions lack optimization for data exchange between multiple threads

Method used

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  • Method and apparatus for loading data in single instruction multi-thread computing system
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  • Method and apparatus for loading data in single instruction multi-thread computing system

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Embodiment Construction

[0019] Preferred embodiments of the present disclosure will be described in more detail below with reference to the accompanying drawings. Although preferred embodiments of the present disclosure are shown in the drawings, it should be understood that the present disclosure may be embodied in various forms and should not be limited by the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the disclosure to those skilled in the art.

[0020] As used herein, the term "comprise" and its variants mean open inclusion, ie "including but not limited to". The term "or" means "and / or" unless otherwise stated. The term "based on" means "based at least in part on". The terms "one example embodiment" and "one embodiment" mean "at least one example embodiment." The term "another embodiment" means "at least one further embodiment". The terms "first", "second", etc. may refer to di...

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PUM

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Abstract

The embodiment of the invention relates to a method and an electronic device for loading data in a single-instruction multi-thread computing system. In the method, a plurality of predicates for a plurality of threads are determined based on a received single load instruction, each predicate indicating whether an address specified in a respective thread is valid, the address being used to access data in a memory; determining at least one execution thread in the plurality of threads based on the determined plurality of predicates; for each execution thread in the at least one execution thread, determining target data; and writing a set of target data for each of the at least one execution thread into a register file of each of the plurality of threads. In this manner, corresponding target data may be determined for each execution thread based on a single load instruction and a set of target data is written to each target thread. In this way, the efficiency of data exchange between the register and the memory can be improved.

Description

technical field [0001] Embodiments of the present disclosure relate generally to the field of electronics, and more particularly to a method and apparatus for loading data in a single instruction multithreading computing system. Background technique [0002] For a conventional single-instruction-multithreading computing system, each thread has its own register file (that is, an array of registers, also called a register file), and each thread can perform thread-level data exchange between its registers and memory. [0003] Currently, a typical load-store architecture is usually used to exchange data between registers and memories. For example, a load instruction may be utilized to read data from memory and store data into registers. However, conventional load instructions lack optimization for data exchange between multiple threads. Therefore, there is a need for a scheme for efficiently loading data for multiple threads in a single instruction multithreading computing sys...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F9/30G06F9/46G06F9/48
CPCG06F9/30098G06F9/462G06F9/4881
Inventor 彭永超袁红岗满新攀赵鹏徐立宝王东辉仇小钢
Owner HEXAFLAKE (NANJING) INFORMATION TECH CO LTD
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