Formation method of semiconductor structure
A semiconductor and gate structure technology, applied in the field of semiconductor structure formation, can solve the problems of poor performance of semiconductor structures, achieve the effect of improving performance and avoiding etching damage
Pending Publication Date: 2022-05-24
SEMICON MFG INT (SHANGHAI) CORP +1
View PDF0 Cites 0 Cited by
- Summary
- Abstract
- Description
- Claims
- Application Information
AI Technical Summary
Problems solved by technology
[0006] However, the semiconductor structure formed by the SDB technology introduced by the prior art has poor performance
Method used
the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View moreImage
Smart Image Click on the blue labels to locate them in the text.
Smart ImageViewing Examples
Examples
Experimental program
Comparison scheme
Effect test
Embodiment Construction
[0031] As described in the background art, the semiconductor structures formed by the SDB technology introduced in the prior art have poor performance. The following will be described in detail with reference to the accompanying drawings.
[0032] Please refer to figure 1 and figure 2 , figure 1 is the top view of the semiconductor structure, figure 2 Yes figure 1 A schematic cross-sectional view along the A-A direction, a substrate 100 is provided, the substrate 100 includes a plurality of device regions A1 and isolation regions B1 located between adjacent device regions A1, the isolation regions B1 and the device regions A1 Arranged along the first direction X; a plurality of fins 101 arranged in parallel along the second direction Y are formed on the device area A1, the first direction X is perpendicular to the second direction Y, and the fins 101 It also spans over the isolation region B1; an isolation layer 102 is formed on the substrate 100, the isolation layer...
the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More PUM
Login to View More Abstract
A forming method of a semiconductor structure comprises the steps that a substrate is provided, a fin part is arranged on the substrate, and the fin part comprises a device region and an isolation region; forming an isolation layer on the substrate; forming a first gate structure on the substrate, wherein the first gate structure comprises a first region and a second region located on the first region; removing the second region to form an initial first opening; removing the isolation region to form a second opening; removing the first region to form a first opening; and forming an isolation structure in the first opening and the second opening. The isolation layer is not etched and removed in the process of forming the first opening and the second opening, so that the stress of the fin part in the device region is not changed, and the performance of the transistor structure in the device region is not reduced. Besides, in the process of etching and removing the isolation region, the isolation layer is covered by the first region, so that the isolation layer can be prevented from being damaged by etching, the stress of the device region cannot be changed, and the performance of the finally formed semiconductor structure is improved.
Description
technical field [0001] The present invention relates to the technical field of semiconductor manufacturing, and in particular, to a method for forming a semiconductor structure. Background technique [0002] As the integration of semiconductor devices increases, the critical dimensions of transistors continue to shrink. However, with the sharp reduction of the size of the transistor, the thickness of the gate dielectric layer and the operating voltage cannot be changed accordingly, which makes it more difficult to suppress the short-channel effect and increases the channel leakage current of the transistor. [0003] The gate of a fin field-effect transistor (Fin Field-Effect Transistor, FinFET) has a fork-shaped 3D structure similar to a fish fin. The channel of the FinFET protrudes from the surface of the substrate to form a fin, and the gate covers the top surface and sidewalls of the fin, so that the inversion layer is formed on each side of the channel, which can contro...
Claims
the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More Application Information
Patent Timeline
Login to View More IPC IPC(8): H01L21/336H01L29/78H01L29/423
CPCH01L29/66803H01L29/785H01L29/42356
Inventor 涂武涛陈建王彦张海洋
Owner SEMICON MFG INT (SHANGHAI) CORP