Manufacture of floating grid for quick-erasing memory unit

Abstract

The manufacture of floating grid for quick-erasing memory cell is to reach flat memory cell. By means of sputtering etching or dry etching process, polysilicon grid and high-density plasma oxide layer are etched to define floating grid. In the said manufacture, no SiN is formed, so as to simplify technological process and avoiding the negative effect of SiN.

Description

technical field [0001] The invention relates to a semiconductor manufacturing method, in particular to a manufacturing method of a floating gate of a flash memory unit. Background technique [0002] Figure 1A to Figure 1B It is a schematic cross-sectional flow diagram of an existing floating gate manufacturing method. see Figure 1A , which has a polysilicon gate 112 (poly gate). A layer of silicon nitride 110 (nitride) is formed on the polysilicon gate 112 . This layer of silicon nitride 110 can function as a hard mask in the planarization step of subsequent processes. However, the silicon nitride layer 110 has its disadvantages. First, the silicon nitride layer 110 needs to be removed by hot phosphoric acid in the subsequent manufacturing process, thus adding one more process step. Second, the silicon nitride layer 110 will induce some defects and also attract some mobile ions. [0003] read on Figure 1A One of the above-mentioned planarization steps is to deposit ...

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Problems solved by technology

[0007] 1. Due to the need for wet etching to remove the high-density plasma oxide layer and silicon nitride layer, it is easy to cause defect problems

[0008] 2. There are problems such as stress in silicon nitride, which will increase the production cost

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