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Bit synchronizing method and bit synchronizer for Gaussian filtering minimum deviation keying demodulation circuit

A technology of frequency shift keying and demodulation circuit, applied in the direction of frequency modulation carrier system, etc., can solve the problems of inability to realize the synchronization of GAUSS signal bits in the GMSK cycle, which is not fixed, and the use of limitations is large, and achieves strong anti-signal interference ability and adaptability. Strong and flexible effect

Inactive Publication Date: 2004-07-28
SOUTHEAST UNIV
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Problems solved by technology

The characteristic of this method is that it can only realize the synchronization of deterministic signals, such as periodic signals with a fixed period, which has great limitations and cannot realize the bit synchronization of GAUSS signals with non-fixed periods, non-single waveforms and severe distortion in GMSK demodulation.

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  • Bit synchronizing method and bit synchronizer for Gaussian filtering minimum deviation keying demodulation circuit
  • Bit synchronizing method and bit synchronizer for Gaussian filtering minimum deviation keying demodulation circuit
  • Bit synchronizing method and bit synchronizer for Gaussian filtering minimum deviation keying demodulation circuit

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Embodiment Construction

[0019] The implementation scheme of the bit synchronizer is a digital bit synchronization implementation scheme, which not only avoids the complexity of the analog circuit, but also realizes the bit synchronization of irregular signals, and can effectively solve the bit synchronization problem in the GMSK demodulation circuit. The input signal is sampled at equal intervals, and the sampling frequency is f 1 Hz, the sampling value is V samp , the baud rate of the signal is f 2 bps, the number of samples corresponding to each standard bit is N std , the crossover level is V mean , with N std =f 1 / f 2 (rounded to the nearest whole number), while N ref Record the number of samples required for the current bit after adjustment (let N ref =N std ), use a counter N to record the number of samples completed in one bit, add 1 to the counter N at the end of each sampling, clear the counter N when a bit ends, and start the sampling count of the next bit; compare N at the end of ...

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Abstract

The present invention is bit synchronizing method and bit synchronizer for Gaussian filtering minimum deviation keying demodulation circuit. The synchronizing method includes the equispaced sampling to input signal, cross zero level corresponding with digital number Vmean, Nstd=f1 / f2, Nref recording the present sampled number; one counter N used to record the sample number within one bit being increased by 1 after each sample and reset for the sample of the next bit in finishing one bit; comparing N with Nref in finishing each sampling and finishing the present bit when N is not smaller than Nref or comparing Vsamp and Vmean in other case; comparing N and Nstd / 2 when Vsamp=Vmean, regulating the present bit needed sample number to Nref=Nstd-1 when N is not smaller than Nref / 2, or else to Nref=Nstd+1.

Description

Technical field: [0001] The invention relates to an implementation scheme of a bit synchronizer in a GMSK (Gaussian filter minimum shift keying) demodulation circuit, which is used to realize the bit synchronization of an output data signal and an input GAUSS analog signal in the GMSK demodulation circuit. Background technique: [0002] The GMSK modulation method is one of the digital modulation methods widely used in wireless communication. Its characteristic is that the digital signal is pre-filtered by a GAUSS filter before being sent to the frequency modulator, and the GAUSS waveform is obtained, and then the GAUSS The waveform is sent to the frequency modulator. During the demodulation process, the radio frequency signal received from the air is demodulated to obtain the GAUSS waveform through FM demodulation, and then the GAUSS waveform is demodulated by GMSK to realize the conversion of the GAUSS waveform to a digital waveform. In GMSK In demodulation, the input GAUSS...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H04L27/14
Inventor 刘昊曾宪伟陆生礼时龙兴
Owner SOUTHEAST UNIV
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