The invention relates to a method for realizing a GMSK (Guassian Minimum Shift Keying) signal generator based on an FPGA (Field Programmable Gate Array), which comprises the following steps: integrating an NRZ (Non-Return-to-Zero) coding module, a Gaussian filter module, a phase accumulation module, an orthogonal modulation module and a D/A (Digital to Analog) conversion module on an FPGA chip, filtering through NRZ coding and filtering mode selecting, accumulating a filtered signal into a phase value, carrying out two paths of ROM (Read Only Memory) table look-up on the phase value, multiplying a cosine value of one of the two paths by a coswt signal, multiplying a sine value of the other path by a sinwt signal and taking a difference between products of the two paths of signals as a generated GMSK modulation signal. The method has the beneficial effects that the signal modulated by the GMSK signal generator, which is realized by adopting the method, can select a filter with different filtering modes through flexibly controlling the switching of the filtering modes according to the filtering requirements of a system to realize the generation of a GMSK signal with different system bandwidth demands; and moreover, the method has the characteristics of high realization speed and less resources occupied, thereby satisfying the demand that the digital information processing system realizes the full digitalization of the GMSK signal generator.