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Solid-state imaging device and method of manufacturing the same

A solid-state imaging device includes: a plurality of N-type photodiode regions formed inside a P-type well; a gate electrode having one edge being positioned adjacent to each of the photodiode regions; a N-type drain region positioned adjacent to the other edge of the gate electrode; an element-isolating portion having a STI structure, and a gate oxide film having a thickness of not more than 10 nm. One edge of the gate electrode overlaps the photodiode region. First, second and third regions are formed on a surface portion extending from the photodiode region to the drain region, in conditions such that the first region is disposed with a predetermined distance from one edge of the gate electrode and has a P-type first concentration C1, the second region is disposed with one edge positioned adjacent to the first region and the other edge overlapping the gate electrode and has a P-type second concentration C2, and the third region is disposed with one edge positioned adjacent to the second region and the other edge positioned adjacent to the drain region and has a P-type third concentration C3, wherein C1>C2>C3 or C1≈C2>C3. The readout characteristic at a low voltage is satisfactory, and image defects such as white flaws and dark current are suppressed sufficiently.
Owner:COLLABO INNOVATIONS INC

Solid-state imaging device and method of manufacturing the same

A solid-state imaging device includes: a plurality of N-type photodiode regions formed inside a P-type well; a gate electrode having one edge being positioned adjacent to each of the photodiode regions; a N-type drain region positioned adjacent to the other edge of the gate electrode; an element-isolating portion having a STI structure, and a gate oxide film having a thickness of not more than 10 nm. One edge of the gate electrode overlaps the photodiode region. First, second and third regions are formed on a surface portion extending from the photodiode region to the drain region, in conditions such that the first region is disposed with a predetermined distance from one edge of the gate electrode and has a P-type first concentration C1, the second region is disposed with one edge positioned adjacent to the first region and the other edge overlapping the gate electrode and has a P-type second concentration C2, and the third region is disposed with one edge positioned adjacent to the second region and the other edge positioned adjacent to the drain region and has a P-type third concentration C3, wherein C1>C2>C3 or C1≈C2>C3. The readout characteristic at a low voltage is satisfactory, and image defects such as white flaws and dark current are suppressed sufficiently.
Owner:COLLABO INNOVATIONS INC
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