Method for packaging thin semiconductor device with reversely mounted chip

Abstract

A process for packaging the thin semiconductor device with reversely mounted chip includes such steps as arranging electric conductive element matrix on a substrate for electrically coupling with thesubstrate, coating a first glue to expose the top of each conductive element in such manner that the said top and the glue top are in the same plane, binding the chip heavy weld pads with glue in such manner that the said weld pads are electrically connected to conductive elements, coating a second glue on two opposite surfaces of the substrate, and connecting weld balls. Its advantages are high connection quality, and low cost.

Description

technical field [0001] The invention relates to a packaging method for a semiconductor device, in particular to a packaging method for electrically connecting a chip and a substrate semiconductor device in a flip-chip (Flip-Chip) manner. Background technique [0002] General flip-chip (Flip-Chip) semiconductor devices, because the solder bumps (Solder Bumps) implanted on the active surface of the chip are used to electrically connect the chip and the substrate instead of the commonly used bonding wires, the substrate used The area can be effectively reduced, so that the size of the overall device can be reduced, so it can meet the requirements of light, thin and small semiconductor devices. [0003] A method for manufacturing a flip-chip semiconductor device generally includes the following steps: 1) forming a plurality of corresponding solder bumps on a plurality of pads on the active surface of a chip; 2) making the chip implant a surface with solder bumps facing down, ea...

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Problems solved by technology

[0004] However, this flip-chip semiconductor device manufacturing method has the following disadvantages: due to the high cost of the chip, if the operation of implanting solder bumps involves brittle chips or incomplete electrical connections between the solder bumps and the chip, The chips that have been implanted with solder bumps cannot be used and must be discarded, so the packaging cost is often high and cannot be effectively reduced; moreover, the ends of the solder bumps implanted on the active surface of the chip are not easy to form a coplanar surface. , so the cloth planting operation often requires higher precision, which increases the packaging cost; at the same time, because the bottom filling operation uses the capillary phenomenon to make the glue flow in the gap between the chip and the substrate, there are often gaps that cannot be completely filled with glue. Voids are formed between the chip and the substrate due to the filling of the liquid, resulting in popcorns in the subsequent temperature cycle (Temperature Cycle) and the formation of unqualified products, so that the qualified rate of finished products cannot be improved.

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