Vertical ROM and its making process
A technology of read-only memory and manufacturing method, which is applied in semiconductor/solid-state device manufacturing, electric solid-state devices, semiconductor devices, etc., and can solve problems such as component leakage current, variable initial voltage, and difficulty in miniaturization of components, so as to reduce Effects of leakage current, good initial voltage distribution, and ease of miniaturization
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no. 1 example
[0034] figure 1 Shown is a schematic diagram of a vertical ROM according to the first embodiment of the present invention.
[0035] Please refer to figure 1 , the vertical read-only memory of the present invention comprises a gate conductor layer 104 disposed on a substrate 100 having a protruding region 102 and a recessed region 108, a conductor layer 114 and a word line 116 used as bit lines, and the substrate 100. The source / drain 106a / 106b and the coding region 110 are arranged in such a way that the gate conductor layer 104 is arranged on the protruding region 102 of the substrate 100, and the conductor layer 114 is arranged on the recessed region 108 of the substrate 100, and It is electrically connected to the source / drain 106a / 106b, and the source / drain 106a / 106b is located in the recessed area 108 of the substrate 100, the coding area 110 is located on the two side walls of the protruding area 102, and the word line 116 is arranged on the on the substrate 100 and el...
no. 2 example
[0039] Figure 2A to Figure 2Q Shown is a schematic cross-sectional view of the manufacturing process of a vertical ROM according to the second embodiment of the present invention.
[0040] Please refer to Figure 2A , forming a gate oxide layer 202 on a substrate 200 with a thickness of about 30 angstroms, and then forming a gate conductor layer 204 on the substrate 200 with a thickness of about 1500 angstroms.
[0041] Next, please refer to Figure 2B , forming a cap layer (Cap Layer) 206 on the substrate 200 and covering the gate conductor layer 204 with a thickness of about 600 angstroms. In addition, a pre-cleaning process (Pre-clean) can be performed before this process, and a post-cleaning process (Post clean) can be performed after this process.
[0042] Then, please refer to Figure 2C , patterning the top cover layer 206 and the gate conductor layer 204 to form a gate stack (Gate Stack) 208 composed of the gate conductor layer 204 a and the top cover layer 206 a ...
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