Non-Volatile semiconductor memory with charging read mode

Abstract

A nonvolatile semiconductor memory device executing an automatic read operation at the time of a power-up is disclosed. For the automatic read operation, it starts to generate a wordline voltage when a power supply voltage at a power-up time reaches a first voltage. When the wordline voltage is charged up to a desired voltage level, a read operation begins automatically.

Description

[0001] This application claims priority from Korean Patent Application No. 2002-6043 filed on February 2, 2002, the contents of which are incorporated herein for reference only. technical field [0002] The present application relates generally to semiconductor memory devices, and more particularly to non-volatile semiconductor memory devices. Background technique [0003] Semiconductor memory devices are generally classified into volatile devices, such as SRAM or DRAM, and nonvolatile devices, such as mask-ROM or flash memory. Since nonvolatile memory stores data even when there is no power source, nonvolatile memory can be read during the time an operating voltage is initially applied to the memory (ie, during "power-up"). In contrast, volatile memories must perform write operations before read operations when powered up because they cannot store data without power. Therefore, at power-up, no valid data is present in the volatile memory device. Such a read operation of t...

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Problems solved by technology

One reason is that if the word line voltage is lower than the desired level, the read operation is performed with the lower word line voltage and the memory cells coupled to the word line voltage (e.g. pass cells) are conditioned to a smaller channel current, causing the read operation to turn on the cell to fail

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