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Packet processing device

A packet processing and processor technology, which is used in selection devices, digital transmission systems, data exchange networks, etc., and can solve problems such as the inability of network processor processing capabilities

Inactive Publication Date: 2004-01-14
FUJITSU LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0006] Demands for adding new functions to IP packet processing devices show an increasing trend, and the processing capacity of packet processing is as high as 2.4Gbps or 10Gps, among which, even the processing capacity of a network processor operating at a high speed cannot reach this level

Method used

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Examples

Experimental program
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no. 1 example

[0061]

[0062] figure 2 The configuration of the IP packet processing apparatus in the first embodiment of the present invention is shown. refer to figure 2 , the IP packet processing device 1 includes: a packet processing engine module 10 , a search engine module 20 , and a packet buffer module 30 .

[0063] The packet processing engine module 10 in the IP packet processing apparatus 1 includes a plurality of processors PE (PE#1˜PE#m) as a multi-engine for performing shared processing in packet routing processing, or as a multi-engine for multitasking packet processing engine. The plurality of processors PE#1 to PE#m constitute the packet processing module 40 .

[0064] In the packet processing module 40, the packet processing is divided into pre-search processing and post-search processing. The pre-search processing refers to the processing performed before the packet is transmitted to the search engine module 20, and the post-search processing refers to processing a...

no. 2 example

[0138] The following will be referred to together Figure 11 , Figure 12 with Figure 13 , the IP packet processing apparatus in the second embodiment of the present invention will be described. Figure 11 The configuration of the IP packet processing apparatus in the second embodiment is shown. Figure 12 It is an explanatory diagram showing a switching control method between pre-search processing and post-search processing by a processor. Figure 13 It is an explanatory diagram showing the outline of threshold value control.

[0139] Generally, in the case of dividing the processing before and after the search processing, the post-search processing requires more processing time than the pre-search processing. Therefore, if an extremely bursty traffic occurs, i.e. if a continuous arrival of short packets occurs, the post-search processing cannot catch up with the traffic, so unprocessed information stays in the processor responsible for the pre-search processing and the ...

no. 3 example

[0156] The following will refer to Figure 14 , the IP packet processing device in the third embodiment of the present invention will be described.

[0157] As a maintenance function of the IP packet processing apparatus 1, it is necessary to collect statistical information, however, two statistics are required, namely: one is routing statistics in units of entries, and the other is queue statistics in the packet buffer module 30 .

[0158] Originally, routing statistics are information known only by the search processing function module of the search engine module 20 , in contrast, packet queue statistics are information known only by the queuing or scheduling function module of the packet processing engine module 10 .

[0159] Therefore, there is a problem that these two pieces of information are read from different function modules and need to be re-edited, and also, the relationship between the input interface information and the queue information is unknown.

[0160] In...

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Abstract

A packet processing device has a search engine module including an associative memory for transferring a packet on the basis of an entry mapping to route information, a first processor taking charge of a pre-search process before a process of the packet to the search engine module, and a second processor taking charge of a post-search process for executing a process of routing the packet on the basis of a search result of the search engine module. In this architecture, the packet processing device further has a table used for transferring and receiving information between the first processor in charge of the pre-search process and the second processor in charge of the post-search processor, and identifying information in a specified field of the table is transferred through the search engine module as a transparent medium.

Description

field of invention [0001] The present invention generally relates to a packet processing device, in particular to an IP packet processing device composed of a multi-engine or multi-task packet processing engine module and a search engine. Background technique [0002] In recent years, the use of the IP (Internet Protocol) protocol as a network layer protocol in a form suitable for the Internet and an intranet (intranet) has rapidly increased. Accompanying this increase is a demand to improve the performance of IP packet processing devices such as routers for performing routing processing of IP packets (hereinafter referred to as packets unless otherwise specified) within the IP network. [0003] Moreover, with the introduction and expansion of IP networks, IP traffic occupies the mainstream of data communications. However, IP packets are defined as variable-length IP datagrams. Therefore, the problem is how to ensure service quality ( QoS). [0004] Generally, an IP packe...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H04L45/58H04L47/6275H04L49/901
CPCH04L47/24H04L45/742H04L49/901H04L47/20H04L49/90H04L69/22H04L45/60H04L45/7453
Inventor 松尾聪西村典久
Owner FUJITSU LTD