Digital time division switching network

A time-division switching and digital technology, which is applied in the field of large-capacity digital time-division switching networks, can solve the problems of reducing the size of data storage and the impossibility of realizing large-capacity time-division switching networks, and achieves the effects of reducing costs and power consumption, and improving reliability

Inactive Publication Date: 2004-05-26
ZTE CORP
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  • Abstract
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Problems solved by technology

[0008] The technical problem to be solved by the present invention is to reduce the scale of the data memory (DM) matri

Method used

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  • Digital time division switching network
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  • Digital time division switching network

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Embodiment Construction

[0030] The present invention will be further described in detail below in conjunction with the accompanying drawings.

[0031] In the present invention, the input time slots at the same positions of m frames are combined into a bit width of m × 8 bits, so that each exchange is carried out in units of time slots of m × 8 bits that are formed by combining them, and then m × 8 bits are combined during output. The frames of time slots are converted into m frames of 8-bit time slots for output. Although the delay of the entire switching process increases, the size of the DM matrix can be reduced. The n×n DM matrix of the traditional T network can thus be simplified to 1× 1 for the DM matrix.

[0032] exist figure 2 In the schematic structure diagram of the present invention shown, the input HW lines are divided into m groups, and each group passes through a serial / parallel conversion module 21 to output parallel data with a width of 8 bits. These data are independently stored in...

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Abstract

The digital time division switching-network includes series/parallel conversion module, digital memory matrix, parallel / series conversion module, module for converting m frames to one frame, multiplexer, handshaking control memory, splitter and module for converting one frame to m frames. Time slots at same position in multiple frames constitutes a time slot with width mx8 bit to be switched. Thus, size of switching matrix is reduced to 1/m2 of original size. Time division non-blocking switch in large capacity signal T structure can be realized so as to raise reliability. The invention is applicable to data communication network.

Description

technical field [0001] The invention relates to a program-controlled digital switching technology, in particular to a large-capacity digital time-division switching network realization technology. Background technique [0002] At present, the switching network of large-capacity office switches at home and abroad is usually composed of T-S n -T or T-T n -T(n≥1) constitutes a multi-level switching network. There are many inherent problems in this multi-level switching network: such as large size, many nodes, low reliability, time slot blocking in switching, long delay, no Support n×64Kb / s exchange, etc., it is difficult to meet the modern telecommunication application. [0003] Theoretically, many shortcomings of multi-level switching networks can be overcome by single-level T-type switching networks. Therefore, designing a single-T high-capacity switching network with a simple structure has always been the goal pursued by researchers in this field. At first, this work bas...

Claims

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Application Information

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IPC IPC(8): H04L5/22H04Q11/04
Inventor 王晓耘陈飞李碧辉李迎风王吉文
Owner ZTE CORP
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