Method for mfg. semiconductor device

Abstract

Provided is a manufacturing method for realizing a low cost and high performance vertical MOSFET. The vertical MOSFET manufacturing method of the present invention gives the portion formed between the trench and the semiconductor substrate flat portion a smooth shape by doping the semiconductor substrate with an impurity through ion implantation and then thermally oxidizing the substrate. The withstand voltage of the gate insulating film is thus improved. Furthermore, the semiconductor device manufacturing method of the present invention puts the formation of the N+ diffusion layer serving as a source after the formation of the trench and the subsequent formation of the gate electrode in the trench, and therefore can avoid re-diffusion of the N+ diffusion layer, which otherwise causes an increase in leak current.

Description

technical field [0001] The invention relates to a method for manufacturing a semiconductor device, in particular to a method for manufacturing a vertical MOSFET with a trench structure. Background technique [0002] Now based on the vertical MOSFET as Figure 5 Describe the prior art. The semiconductor substrate has a P-type diffusion layer 3 on its surface, an N-type semiconductor substrate 2 on its lower part, and an N+ type semiconductor substrate 1 below it. Trench 6 is formed at a depth beyond P-type diffusion layer 3 and reaches N-type semiconductor substrate 2 . A gate insulating film 7 is formed on the surface of the trench 6 , and a gate electrode 8 made of polysilicon or the like is embedded therein. Then, an N+ type diffusion layer 5 is provided in the P − type diffusion layer 3 (for example, refer to Patent Document 1). [0003] exist Figure 5 of vertical MOSFETs. Between the N+ semiconductor substrate 1 (high-concentration drain) and N- semiconductor substr...

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Problems solved by technology

[0008] By performing tapered etching on the trench 6, the problem of lower withstand voltage of the gate i

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