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Rectangular steiner tree method of super large size integrated circuit avoiding barrier

A large-scale integrated circuit, barrier technology, applied in the direction of electrical digital data processing, special data processing applications, instruments, etc., can solve the problem of not being applicable to large-scale wire networks, etc.

Inactive Publication Date: 2005-03-02
TSINGHUA UNIV
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

However, there are still shortcomings in this method: the shape of obstacles is limited to convex polygons, and the method of circumventing obstacles depends on the construction results of the initial Steiner tree, which is not suitable for large-scale line networks.
[0017] In addition, the literature [Huang Lin, Zhao Wenqing, Tang Pushan. A construction method of Steiner tree with floating endpoints. Journal of Computer-Aided Design and Graphics. Vol.10, No.6, 1998.11.] in the specific analysis and method description , no description for disabled conditions

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  • Rectangular steiner tree method of super large size integrated circuit avoiding barrier
  • Rectangular steiner tree method of super large size integrated circuit avoiding barrier
  • Rectangular steiner tree method of super large size integrated circuit avoiding barrier

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Embodiment Construction

[0128] Firstly, the core idea of ​​the "right-angle Steiner tree method considering obstacles" involved in this patent application is specifically analyzed.

[0129] After reading and processing the information of circuit obstacles and wire nets, the core part of this method is the process of constructing the Steiner tree. The overall flow chart is as follows figure 1 shown. The idea of ​​this method is different from the previous methods. The method is divided into three steps to construct the final result tree: the first step is to find the FST (fulsome Steiner tree) of all endpoints, and delete the FST that intersects with obstacles; Construct the sub-Steiner tree in the subgraph composed of the FST below; the third step uses the detour method to connect all the sub-Steiner trees into a complete Steiner tree. The three steps of the method are described below.

[0130] Step 1: Find the FST (fulsome Steiner tree) of all endpoints, and delete the FST that intersects with obs...

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Abstract

The obstacle avoiding rectangular Steiner tree method for very large scale integrated circuit (VLSI) design belongs to the field of computer-aided VLSI design technology, and is especially VLSI wiring design. The present invention features the first application of full Steiner tree (FST) end point separating method, subsequent construction of son Steiner tree by means of ant swarm method and voracious FST method for different son sets, and final connection of all the son Steiner trees in detour method. The said algorithm can process multiple end point wire mesh; can process complex obstacles and can process large scale issue in relatively short time. The present invention realizes obstacle avoiding rectangular Steiner tree constructing method with optimized wire length and time efficiency in VLSI wiring design.

Description

technical field [0001] Integrated circuit computer-aided design is the technical field of IC CAD, especially the field of VLSI wiring design. Background technique [0002] In integrated circuit (IC) design, physical design is one of the main steps, but also the most time-consuming step. A computer-aided design technique related to physical design is called layout design. In layout design, wiring is an extremely important link. [0003] The design scale of integrated circuits is currently developing from very large scale (VLSI), very large scale (ULSI) to G scale (GSI), and the design concept of system-on-chip (SOC) has emerged. The research on the construction method of the minimum rectangular Steiner tree (rectilinear Steinerminimal tree, RSMT) is an important issue in the VLSI / ULSI / GSI / SOC layout design, especially in the wiring research. In the actual wiring process, because the macro module, IP module and pre-wiring will all become obstacles, the RSMT method consideri...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F17/50
Inventor 洪先龙经彤胡昱冯哲杨旸
Owner TSINGHUA UNIV
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