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Semiconductor device with memory and method for memory test

By adopting the error detection technology of test code mode and Hamming matrix in semiconductor memory, joint testing of data memory and code memory is realized, which solves the problems of long test time and high cost in the existing technology, and improves test efficiency and economy. sex.

Inactive Publication Date: 2005-09-14
KK TOSHIBA
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Therefore, it becomes the main cause of increased test cost

Method used

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Embodiment Construction

[0014] Embodiments are described below with reference to the drawings.

[0015] (Structure of semiconductor device)

[0016] figure 1 It is a block diagram showing a main part of the semiconductor device of the embodiment.

[0017] The semiconductor device 1 of the present embodiment has a data memory 10 for storing data, and a code memory 11 for storing error correction code (ECC code)—code data (redundant code).

[0018] Examples of the data memory 10 and the code memory 11 include DRAM, SRAM, flash memory, FeRAM, and MRAM. In addition, the semiconductor device 1 may be an LSI chip such as a microprocessor instead of a semiconductor memory device.

[0019] Furthermore, the semiconductor device 1 incorporates an error correction circuit (ECC circuit) 12 , an interface (I / F) 13 , and a test circuit 14 .

[0020] As described later, the ECC circuit 12 has the function of using a Hamming matrix (or Hamming code: Hamming code) with an error detection function to generate code...

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Abstract

A semiconductor device is disclosed which includes a data memory which stores data and a code memory which stores an ECC code corresponding to the data. The semiconductor device includes an ECC unit which outputs, to the data memory as the data, a test pattern required to test the data memory, and which generates, from the test pattern, code information having an error checking function, and outputs the code information to the code memory as the ECC code.

Description

[0001] This application is based on and claims priority from Japanese Patent Application No. 2004-36077 filed on February 13, 2004, the entire contents of which are hereby incorporated by reference. technical field [0002] The present invention relates to common semiconductor devices, and in particular to a semiconductor device including a memory and a memory testing method for testing the memory. Background technique [0003] In general, among semiconductor memory devices, there is an ECC circuit built-in semiconductor device including an error correction circuit (ECC circuit: error checking and correcting circuit). In such semiconductor memory devices with built-in ECC circuits, two types of memories are mounted: a data memory for storing data and a code memory for storing ECC codes (see, for example, USP.6295617). [0004] In such a semiconductor memory device, there is a memory test method in which a memory is tested using a built-in test circuit and an ECC circuit (see...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F12/16G11C7/00G11C29/00G11C29/42
CPCG11C29/42B60Y2200/15B60Y2200/411B60Y2200/412
Owner KK TOSHIBA