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Virtual machine control structure decoder

A control structure and virtual machine technology, applied in the field of decoding VMX instructions, can solve problems such as instruction access, inaccessibility, and computer system performance damage

Inactive Publication Date: 2010-05-12
INTEL CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

May cause further processing loss if VMREAD and VMWRITE access data that is not accessible
VMCS data may be inaccessible to VMREAD and VMWRITE instructions for reasons such as VMCS entries containing write-only or read-only data fields, or that data is not normally accessible by these instructions
[0006] The processing penalty incurred by VMREAD or VMWRITE in the VMX architecture may also cause the performance of the computer system to suffer
In addition, the prior art VMCS ID decoding system has been unable to effectively solve this problem

Method used

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Embodiment Construction

[0017] Embodiments of the present invention relate to the Virtual Machine Extensions (VMX) architecture. More specifically, embodiments of the invention relate to improving the execution performance of VMREAD and VMWRITE instructions.

[0018] To improve processing performance in the VMX architecture, embodiments of the present invention increase the decoding speed of the Virtual Machine Control Structure (VMCS) Identification (ID) field. In one embodiment of the invention, logic that may be located in a processing element (such as a microprocessor) is used to enhance VMREAD or The speed at which the VMWRITE instruction can access the field.

[0019] figure 1 A structure ("virtual machine environment") for interfacing guest software to a microprocessor is illustrated. Specifically, figure 1 A virtual machine manager (VMM) 101 that interfaces two virtual machines (VMs) 105 (“guest software”) to a microprocessor 110 is illustrated. The software running within each VM can in...

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Abstract

A virtual machine extension (VMX) architecture. More particularly, embodiments of the invention relate to improving the performance of execution of VMREAD and VMWRITE instructions.

Description

technical field [0001] Embodiments of the present invention relate to the Virtual Machine Extensions (VMX) architecture. More specifically, embodiments of the present invention relate to methods and apparatus for decoding VMX instructions using a virtual machine control structure (VMCS) token decoder. Background technique [0002] Virtual Machine Extensions (VMX) architecture allows multiple software programs and operating systems to use the same microprocessor logic ("hardware") by allocating processor resources to various software applications and operating systems at different times. [0003] VMX architectures typically use a virtual machine monitor (VMM) program that interfaces one or more software programs, such as a virtual machine (VM), to a single microprocessor or group of processing elements. Guest software running on each VM may include a guest operating system and various guest software applications. Additionally, applications and operating systems running on t...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F9/318G06F9/312G06F9/38G06F9/455
CPCG06F9/30043G06F9/3017G06F9/3851G06F9/3004
Inventor 桑乔伊·蒙代尔罗伯特·法雷尔
Owner INTEL CORP