Out-ring power control method for upline enhancement special channel
A technology for outer loop power control and enhancement of dedicated channels, applied in the direction of transmission control/equalization, etc., can solve the problems of narrowing the SIRtarget difference, the receiving quality of another channel cannot meet the requirements, and the SIRtarget difference is large, etc., to reduce the effect of uplink interference.
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Embodiment 1
[0087] Embodiment 1: Embodiment of an outer loop power control method for an uplink data channel in an E-DCH
[0088] Node B measures uplink reception quality and reports to RNC, including DCH uplink reception quality and E-DCH uplink reception quality, uplink reception quality includes DCH and E-DCH block error rate, that is, CRC check result, DCH and E-DCH transmission channel The bit error rate may also report the number of E-DCH data transmissions to the RNC.
[0089] The RNC sets the target signal-to-noise ratio (SIR target) of the outer loop power control according to the uplink reception quality of the DCH transmission channel, which is based on the uplink reception quality of the DCH transmission channel. When the DCH uplink reception quality is higher than the target value, the SIR target will be Decrease, when the DCH uplink reception quality is lower than the target value, the SIR target will be increased, and then the RNC will send the value of the SIR target to th...
Embodiment 2
[0122] Embodiment 2: Embodiment of the method for controlling the outer loop power of the uplink control channel in the E-DCH
[0123] RNC sets the initial value of the power offset of E-DPCCH / DPCCH and transmits it to UE and Node B.
[0124] The RNC reconfigures the power offset of the E-DPCCH / DPCCH.
[0125] The RNC resets the power offset of the E-DPCCH / DPCCH according to the change of the power offset of the E-DPDCH / DPCCH. When the additional E-DPDCH / DPCCH power offset increases, the E-DPCCH / DPCCH power offset also increases; when the additional E-DPDCH / DPCCH power offset decreases, the E-DPCCH / DPCCH power offset remains remain unchanged or decrease. In order to ensure the quality of the E-DPCCH, the speed at which the power offset of the E-DPCCH / DPCCH decreases is lower than the speed at which it increases. This method is relatively simple to adjust the power offset of the E-DPCCH / DPCCH, and does not require the Node B to estimate and report the quality of the E-DPCCH....
Embodiment 3
[0128] Embodiment 3: When the E-DCH carries multiple QoS data, an embodiment of the method for controlling the outer loop power of the uplink data channel in the E-DCH
[0129] From the perspective of the MAC layer, when the E-DCH channel carries multiple QoS, data of different QoS can be carried in different MAC_d flows, and multiple MAC_d flows can be mapped to one MAC_e PDU. Therefore, in one TTI, the E-DCH may only carry QoS1 data, may only carry QoS2 data, or may simultaneously carry QoS1 and QoS2 data.
[0130] In this case, the outer loop power control of the uplink data channel in the E-DCH can use the following method: Node B measures the uplink reception quality and reports it to the RNC, including the DCH uplink reception quality, and the QoSi (i=1, 2, ..., N; N is the maximum number of QoS that can be carried by E-DCH) Uplink reception quality of data, uplink reception quality can include DCH and E-DCH block error rate, that is, CRC check result, DCH and E-DCH Tra...
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