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Extended Reed-Solomon code decoding method which error-correcting capcity is 2

An error correction capability and decoding technology, which is applied in the decoding field of extended Reed-Solomon codes, can solve problems such as slow decoder speed and complicated decoding methods, and achieve simple decoding, fast decoding speed, correcting strong error effect

Inactive Publication Date: 2010-05-05
CENT FOR SPACE SCI & APPLIED RES
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0005] The purpose of the present invention is in order to overcome because the decoding method of RS code is complicated, is unfavorable for the shortcoming that the decoder speed of engineering realization or realization is slower, thereby provides a kind of can pass through RS (256,252) coded in large-capacity memory Perform high-speed error correction decoding on the data to correct errors within two bytes. The entire error correction decoding circuit is implemented in a programmable logic device (which can be an FPGA) chip. Reed-Solomon code error correction decoding method , the method is suitable for extended RS codes with an error correction capability of 2

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  • Extended Reed-Solomon code decoding method which error-correcting capcity is 2
  • Extended Reed-Solomon code decoding method which error-correcting capcity is 2
  • Extended Reed-Solomon code decoding method which error-correcting capcity is 2

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Embodiment 1

[0084] The RS (256, 252) code is error-corrected and decoded using the decoding method described in the present invention. In this embodiment, it is assumed that there is no error in the RS (256, 252) code word. The error correction decoding process is as follows.

[0085] 1) First, input the data block to be decoded into the adjoint formula calculation circuit, and calculate the adjoint formula S(S 0 , S 1 , S 2 , S 3 ); Simultaneously, the RS encoded data R (x) of input is deposited into FIFO (first-in-first-out cache); In the present embodiment, 256 bytes of data will be stored into the first-in-first-out cache, and the accompanying data about these data is calculated formula, get the result of the accompanying formula: S 0 = S 1 = S 2 = S 3 =0.

[0086] 2) Calculate the result S(S according to the accompanying formula of step 1) 0 , S 1 , S 2 , S 3 ), calculate the auxiliary parameter B needed in step 3) and step 4) 0 , B 1 , B 2 , E, CO 0 and CO 1 , the c...

Embodiment 2

[0116] In this embodiment, if an error occurs in the data of the 256th byte of the correct RS (256, 252) codeword, it changes from 8'h9D to 8'h0D. Use the decoding method described in the present invention to perform error correction decoding.

[0117] 1) First, input the data block to be decoded into the adjoint formula calculation circuit, and calculate the adjoint formula S(S 0 , S 1 , S 2 , S 3 ), and at the same time, store the input RS coded data R(x) into FIFO (first-in-first-out buffer). In this embodiment, the calculation result of the accompanying formula is S 0 =8'h90≠0, S 1 = S 2 = S 3 =0.

[0118] 2) Calculate the result S(S according to the accompanying formula of step 1) 0 , S 1 , S 2 , S 3 ), calculate the auxiliary parameter B needed in step 3) and step 4) 0 , B 1 , B 2 , E, CO 0 and CO 1 , the calculation formula is B 2 = S 1 S 2 +S 0 S 3 , E=S 1 S 2 / S 3 , CO 0 =B 0 S 1 / B 2 , CO 1 =B 1 S 0 / B 2 . In this embodiment, eac...

Embodiment 3

[0131] In this embodiment, if an error occurs in the data of the first byte of the correct RS (256, 252) codeword, it changes from 8'h01 to 8'h0A. Use the decoding method described in the present invention to perform error correction decoding.

[0132] 1) First, input the data block to be decoded into the adjoint formula calculation circuit, and calculate the adjoint formula S(S 0 , S 1 , S 2 , S 3 ); Simultaneously, the RS encoded data R (x) of input is deposited into FIFO (first-in-first-out cache); In the present embodiment, 256 bytes of data will be stored into the first-in-first-out cache, and the accompanying data about these data is calculated formula, the result is: S 0 =8'h0B≠0, S 1 =8'h8B≠0, S 2 =8'hCB≠0, S 3 =8'hEB≠0.

[0133] 2) Calculate the result S(S according to the accompanying formula of step 1) 0 , S 1 , S 2 , S 3 ), calculate the auxiliary parameter B needed in step 3) and step 4) 0 , B 1 , B 2 , E, CO 0 and CO 1 , the calculation formula i...

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Abstract

A decoding method of expanded Reed-Soloman code with error correction ability of 2 includes calculating out syndrome of data with error to be corrected, storing data in FIFO buffer, calculating auxiliary parameter according to syndrome calculation result, confirming number and scope of error code according said result and said parameter, calculating out error value error position as per differenterror situation, adding data in buffer with error value for correcting error, deleting calibration byte to finalize error correction decoding.

Description

technical field [0001] The invention relates to a method for processing data using Reed-Solomon codes adopted by many large-capacity memories as an error control method, in particular to a decoding method of extended Reed-Solomon codes with an error correction capability of 2. Background technique [0002] In the transmission and storage of information, due to the interference of channel or environmental noise, errors in the transmitted and stored information often occur. In 1948, Shannon proposed information theory. Among them, "Channel Coding Theorem for Disturbed Discrete Channels" points out the technology of error control by increasing the redundancy of information, that is, the information data is coded before transmission and storage, and the redundant information is decoded and corrected when receiving and extracting data. Errors that occur during transmission and storage. People have studied a variety of codewords and encoding and decoding methods. In 1960, REED ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H03M13/00G11B20/18
Inventor 张玉良曹松陈小敏孙辉先
Owner CENT FOR SPACE SCI & APPLIED RES
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