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Semiconductor device and manufacturing method thereof

A device manufacturing method, semiconductor technology, applied in semiconductor/solid-state device manufacturing, semiconductor devices, semiconductor/solid-state device components, etc.

Inactive Publication Date: 2011-04-13
AOI ELECTRONICS CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Therefore, the area of ​​the entire semiconductor device will become larger
Also, since the wire length becomes longer, the resistance value becomes larger and less suitable for high frequency

Method used

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  • Semiconductor device and manufacturing method thereof
  • Semiconductor device and manufacturing method thereof
  • Semiconductor device and manufacturing method thereof

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0048] first embodiment

[0049] A semiconductor device according to a first embodiment of the present invention will be described below with reference to a cross-sectional view in Fig. 1. The semiconductor device includes a base plate 1 in a rectangular shape. The base plate 1 is formed, for example, of epoxy-based resin impregnated into a fiberglass base. Upper-layer wiring 2 formed of copper foil is formed on the upper surface of chassis 1 , and lower-layer wiring 3 formed of copper foil is formed on the lower surface of chassis 1 . The upper layer wiring 2 serves as ground wiring and has a pattern formed on substantially the entire surface. The lower layer wiring 3 functions as a current source (power supply) wiring and has a pattern formed on substantially the entire surface.

[0050] The semiconductor element 4 is provided on the upper layer wiring 2 . More specifically, the semiconductor element 4 has a rectangular outer shape and has a size somewh...

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PUM

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Abstract

A first semiconductor element (4) is mounted on a base plate (1), and is in a sealed state by the periphery thereof being covered by an insulation member (16), and the upper surface thereof being covered by an upper insulation film (17). An upper wiring layer (20, 24) formed on the upper insulation film (17), and the lower wiring layer (33, 37) formed below the base plate (1) via lower insulationfilms (31, 34) are connected by conductors (43). A second semiconductor element (40) is mounted exposed, being connected to the lower wiring layer (33, 37).

Description

technical field [0001] The present invention relates to a semiconductor device and a method of manufacturing the same. Background technique [0002] In Unexamined Japanese Patent Application (KOKAI) Publication No. 2002-368184, there is disclosed a multi-chip semiconductor device in which a plurality of semiconductor chips are mounted on islands of lead frames, and each semiconductor chip is connected to Inner pin bonding, and the mounted multiple semiconductor chips are completely resin molded. Since a plurality of semiconductor chips are mounted on one lead frame, resulting in a large lead frame, the semiconductor device occupies a large mounting (occupancy) area. Manufacturing costs are also high because wire bonding using lead frames is employed. [0003] A semiconductor device having a small mounting area is disclosed in Unexamined Japanese Patent Application (KOKAI) Publication No. 2003-273321. The semiconductor device has a plurality of double-sided substrates, and...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L23/538H01L23/52H01L21/3205H01L23/12H01L25/10H01L25/11H01L25/18
CPCH01L2924/3025H01L2924/01079H01L2924/15311H01L2224/32145H01L2924/19041H01L2924/01078
Inventor 胁坂伸治定别当裕康若林猛三原一郎
Owner AOI ELECTRONICS CO LTD