Welding pad structure for electronic device
A technology for soldering pads and integrated circuits, which is applied to circuits, electrical components, and electrical solid-state devices, etc., can solve the problems of large parasitic capacitance, reduced integrated circuit performance, and close distance between the multi-layer soldering pad structure and the substrate.
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[0020] The following fit Figure 3A and 3B Describe the soldering pad structure of the electronic device of the embodiment of the present invention, wherein Figure 3A A schematic plan view of the solder pad structure is drawn, while Figure 3B draw the edge Figure 3A Schematic cross-sectional view of line 3B-3B.
[0021] exist Figure 3B Among them, the pad structure includes: an insulating layer 102 , a top metal layer 108 , a metal layer 106 and a metal layer 104 . The insulating layer 102 is disposed on a substrate 100 . Here, the substrate 100 may be a silicon substrate or other semiconductor substrates. Various elements, such as transistors, resistors, and other well-known semiconductor elements, may be included in the substrate 100 . Furthermore, the substrate 100 may also include an inter-layer dielectric (ILD) layer or an inter-metal dielectric (IMD) layer. In order to simplify the drawing, only a flat substrate is shown here.
[0022] In an embodiment of th...
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