Electrically alterable non-volatile memory with n-bits per cell

Abstract

A multi-bit memory device with a memory cell means for storing input information for an indefinite period of time. The multi-bit memory means stores information in up to Kn memory states (Kn>1). A memory cell programming means and comparator means is also included. The present multi-bit memory device also includes a voltage divider arrangement with pull-up devices in a memory array to provide stable and accurate reference voltages over process, temperature, and voltage variations.

Description

[0001] This application is a continuation-in-part of U.S. patent application Ser. No. 08 / 071,816, filed Jun. 4, 1993 entitled "Electrically Alterable Non-Volatile Memory with N-Bits Per Memory Cell," which is a continuation of U.S. patent application Ser. No. 07 / 652,878, filed Feb. 8, 1991 (now U.S. Pat. No. 5,218,569) entitled "Electrically Alterable Non-Volatile Memory with N-Bits Per Cell."

[0002] 1. Field of the Invention

[0003] This invention relates to non-volatile memory (NVM) devices; and, more particularly, is concerned with an apparatus and method for providing a multi-level NVM device with stable reference voltages.

[0004] 2. Description of the Background Art

[0005] In conventional single-bit per cell memory devices, the memory cell assumes one of two information storage states, either an "on" state or an "off" state. This combination of either "on" or "off" defines one bit of information. As a result, a memory device which can store n-bits of data requires n separate memory ...

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