Diffusion barrier layer for lead free package substrate
a technology of diffusion barrier layer and lead-free package, which is applied in the direction of printed circuit manufacturing, conductive pattern reinforcement, basic electric elements, etc., can solve the problems of void formation in the solder ball, increase in circuit density and complexity, and equally dramatic decrease in power consumption and package siz
Inactive Publication Date: 2005-03-31
INTEL CORP
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- Description
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- Application Information
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Benefits of technology
The present invention relates to a method for preventing the formation of voids in solder bumps or balls used in semiconductor packaging. The invention addresses the problem of voids that can occur during the reflow of solder to form the solder bumps or balls. The invention also addresses the issue of brittle fractures that can occur after the reflow of solder, which can lead to failed solder joints and electrical open failures in electronic devices. The invention provides a method for forming a pad on an electronic device with a diffusion retarding layer to prevent the formation of voids and brittle fractures, thereby improving the reliability and performance of semiconductor packaging.
Problems solved by technology
The semiconductor industry has seen tremendous advances in technology in recent years that have permitted dramatic increases in circuit density and complexity, and equally dramatic decreases in power consumption and package sizes.
In some applications, as the solder material is reflowed to form the balls or bumps, the interdiffusion process from a copper (Cu) pad is rapid and results in formation of voids in the solder ball.
Currently, however, governments are requiring that the solder used to form the bumps or balls is lead-free since lead is known to be toxic to humans.
The Kirkendall voids are undesirable since the structure formed generally is weaker than a ball or bump with fewer voids.
In addition, the Kirkendall voids may also negatively effect the electrical performance of the solder ball and joint formed using the solder ball.
The phosphorus has been found to cause brittle fractures after the reflow of the solder to form solder bumps or balls.
The brittle fractures may develop due to mechanical bending, which can result in a separation interface between the solder matrix and the component pad.
Fatigue failure can also result in a crack propagating across the pad.
These cracks or brittle fractures can result in failed solder joints, that in turn result to electrical open and failure of electronic device.
The component can pass tests within the factory and then a field failure can occur.
Such failures are undesirable as consumers of these components develop negative impressions of the providers of these parts.
In addition, finding and fixing field failures is a very expensive and time consuming process.
Method used
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[0017] In the following detailed description of the preferred embodiments, reference is made to the accompanying drawings that form a part hereof, and in which are shown by way of illustration specific embodiments in which the invention can be practiced. The embodiments illustrated are described in sufficient detail to enable those skilled in the art to practice the teachings disclosed herein. Other embodiments can be utilized and derived therefrom, such that structural and logical substitutions and changes can be made without departing from the scope of present inventions. The following detailed description, therefore, is not to be taken in a limiting sense, and the scope of various embodiments of the invention is defined only by the appended claims, along with the full range of equivalents to which such claims are entitled.
[0018]FIG. 1 is a isometric view of a substrate 100. The substrate 100 includes a first major surface 110 and the second major surface 120. On the first major ...
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A ball grid array device includes an array of pads made of an electrically conductive material. The array of pads is positioned on the first major surface. At least one of the array of pads includes a diffusion retarding layer to retard the rate of diffusion of the electrically conductive material from the pad. The ball grid array device also includes a binding layer for binding the diffusion retarding layer to the conductive material of the at least one pad. The ball grid array device also includes a layer of material for receiving solder placed on the diffusion retarding layer.
Description
FIELD OF THE INVENTION [0001] The present invention is related to packages for semiconductor devices. More specifically, the present invention relates to an apparatus for diffusion barrier layer for lead free package substrate and a method associated with forming diffusion barrier layers for lead free package substrates. BACKGROUND OF THE INVENTION [0002] The semiconductor industry has seen tremendous advances in technology in recent years that have permitted dramatic increases in circuit density and complexity, and equally dramatic decreases in power consumption and package sizes. Present semiconductor technology now permits single-chip microprocessors with many millions of transistors, operating at speeds of tens (or even hundreds) of MIPS (millions of instructions per second), to be packaged in relatively small, air-cooled semiconductor device packages. A by-product of such high density and high functionality in semiconductor devices has been the demand for increased numbers of e...
Claims
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IPC IPC(8): H01L23/498H05K3/24
CPCH01L23/49816H05K3/244H01L2924/0002H01L2924/00
Inventor LEONG, KUM FOOCHUNG, CHEE KEYSIM, KIAN SIN
Owner INTEL CORP