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Security tag and process for making same

a technology of security tags and process steps, applied in the field of resonant tags, can solve problems such as excessive waste of metallic foils

Inactive Publication Date: 2006-04-06
CHECKPOINT SYST INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

The present invention provides two methods for making a resonant frequency circuit. The first method involves creating a pattern on a substrate and laminating a conductive foil to the surface of the substrate to form a conductive layer. The second method involves creating a pattern on a substrate and etching the conductive layer to form a conductive trace. The two methods result in a circuit that can resonate at a desired frequency. The technical effects of the invention include improved efficiency and accuracy in creating resonant frequency circuits.

Problems solved by technology

This process, while yielding the necessary precision, results in excessive waste of the metallic foil.

Method used

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  • Security tag and process for making same

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Embodiment Construction

[0021] Referring to the drawings, wherein like numerals are used to indicate like elements throughout the several figures, the use of the indefinite article “a” may indicate a quantity of one, or more than one, of an element, and the use of the article “or” indicates a Boolean “exclusive or” function there is shown in FIGS. 1 and 3A-3E a process 10a for making a resonant tag according to a first preferred embodiment.

[0022] According to a first preferred embodiment, a first substrate 13 for the resonant tag is stored on a first unwind roll 12. Preferably, the first substrate 13 is paper which has been calendared in order to provide a densified sheet having a smooth finish and a uniform thickness. An adhesive is applied to a surface 13a of the first substrate 13 as the first substrate 13 is removed from the unwind roll 12 (FIG. 3A). The adhesive forms a first adhesive layer 19 in a first predetermined pattern on the surface 13a of the substrate 13. Preferably, the adhesive forming th...

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Abstract

A tag and method of making it. The tag includes a first adhesive layer provided in a first predetermined pattern between a surface of a first substrate and a first conductive foil. The first pattern corresponds to a pattern for a first conductive trace, e.g., a portion of a resonant circuit. The first conductive foil is laminated, e.g., adhesively secured, to the surface of the first substrate to form a first conductive layer. A first portion of that layer is shaped, e.g., die-cut, to generally correspond to the first pattern. A second portion of the first conductive layer not corresponding to the first portion is removed, to establish the first conductive trace, with the adhesive layer confined within the boundaries of the first conductive trace. Another conductive trace is secured to the first conductive trace, with a dielectric therebetween, to form a resonant circuit.

Description

CROSS-REFERENCE TO RELATED APPLICATIONS [0001] This application is a continuation of U.S. patent application Ser. No. 10 / 235,733, filed on Sep. 5, 2002 entitled “Security Tag and Process for Making Same”, which claims the benefit of Provisional Application Ser. No. 60 / 322,666, filed on Sep. 17, 2001, the subject matter of which is incorporated herein by reference.BACKGROUND OF THE INVENTION [0002] 1. Field of Invention [0003] The present invention relates to resonant tags and more particularly to a process for making resonant frequency circuits for use as resonant tags. [0004] 2. Description of Related Art [0005] Resonant tags are tags which include a passive electrically resonant frequency circuit which resonates at a predetermined frequency when stimulated by a radio frequency electromagnetic field at about the resonant frequency of the tag and which is incident upon the resonant tag. The resonant frequency circuit resonating within a region occupied by the electromagnetic field p...

Claims

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Application Information

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Patent Type & Authority Applications(United States)
IPC IPC(8): G06K19/02G06K19/06B32B38/00H05K1/16B32B38/10G08B13/24H05K3/04
CPCB32B38/0004B32B38/10B32B2311/24Y10T156/108G08B13/244Y10T156/1085B32B2317/12B32B15/04
Inventor APPALUCCI, LAWRENCECOTE, ANDREPEREZ, DAVID LOPEZMAZOKI, GARY THOMASPICCOLI, ANTHONY FRANKMARTINEZ, ROLANDO ROQUESSOLER BONNIN, LUIS FRANCISCOMATSUMOTO, TAKESHIIMAICHI, HIDEAKI
Owner CHECKPOINT SYST INC
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