Method and system for fabricating and cleaning free-standing nanostructures

a free-standing nanostructure and nano-structure technology, which is applied in the field of systems and corresponding methods for fabricating and cleaning free-standing nanostructures on semiconductor wafers, can solve the problems of insufficient charge stored in storage capacitors to produce detectable signals, loss of information stored in memory cells, and adversely affecting the properties of components, etc., to achieve the effect of reducing the number of etching steps, and reducing the number of etching tim

Inactive Publication Date: 2006-08-31
INFINEON TECH AG
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

[0014] Accordingly, stiction free processing is achieved by employing unique properties of carbon dioxide in the supercritical or liquid state. The supercritical state is a high density phase characterized by a low viscosity and a zero surface tension, thus enabling better solubility and efficiency of the etching chemistry. On the other hand, properties similar to a gas phase presents high diffusion capabilities, allowing for easy solvent removal and greater drying efficiency. Another feature of the invention is that all process steps are performed in the same process chamber. This ensures that no air-liquid interfaces during transfer between etching, cleaning and drying process modules can occur. Accordingly, capillary forces are eliminated. This is achieved by employing carbon dioxide in its various states, i.e. supercritical, liquid and gas. Furthermore, a cleaning step is applied which removes residues on the surface of the free-standing nanostructures. The cleaning step is performed in the same process chamber thus utilizing a supercritical process sequence which allows for adding a cleaning solution. As a result, contaminants on the surface of the free-standing nanostructures are largely eliminated.

Problems solved by technology

For certain components, like capacitors, shrinking adversely affects the properties of the component.
If the capacity of the storage capacitor is too small, the charge stored in the storage capacitor is not sufficient to produce a detectable signal.
In such a case, the information stored in the memory cell is lost and the memory cell is not operating in a desired manner.
However, with the ever decreasing feature sizes of structures, etching and / or cleaning steps become increasingly difficult.
With reduced feature sizes, this may lead to adhesion of neighboring structures.
Exposing wafers to an air-liquid interface during transfer between etching, cleaning and drying process modules is detrimental to obtaining stiction free process performance.
Failing to achieve stiction free process performance ultimately results in a low yield of the produced circuits.
However, such gas phase processing leads to etching residues and to silicon surface termination states which in turn hinders further processing.

Method used

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Embodiment Construction

[0027] Exemplary embodiments of methods and systems according to the invention are discussed in detail below. It is appreciated, however, that the present invention provides many applicable inventive concepts that can be embodied in a wide variety of specific contexts. The specific embodiments discussed are merely illustrative of specific ways to apply the method and the system of the invention, and do not limit the scope of the invention.

[0028] In particular, the following embodiments are described in the context of fabricating bottom electrode structures for stacked capacitor DRAM cells and surrounding gate transistors for a vertical cell technology. In both technologies, free-standing nanostructures are formed as protruding elements on the surface of a semiconductor wafer having, in accordance with present technologies, a height to width ratio in excess of 20. It should be noted, however, that the inventive methods and systems can be applied for other high aspect ratio nanostruc...

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Abstract

Systems and methods include introducing a semiconductor wafer into a process chamber. An etching chemistry is injected into the process chamber to etch a patterned layer and to release free-standing nanostructures on the semiconductor wafer. The etching chemistry includes a supercritical or liquid carbon dioxide fluid and an etching solution. The semiconductor wafer is rinsed by flooding a supercritical or liquid carbon dioxide fluid into the process chamber. The semiconductor wafer is dried by venting out supercritical or liquid carbon dioxide fluid from the process chamber.

Description

CROSS-REFERENCE TO RELATED APPLICATION [0001] This is a continuation-in-part application of U.S. application Ser. No. 11 / 066,320, entitled “Method and System for Fabricating Free-Standing Nanostructures” and filed Feb. 25, 2005 which is incorporated herein by reference in its entirety.FIELD OF THE INVENTION [0002] The invention relates to systems and corresponding methods for fabricating and cleaning free-standing nanostructures on a semiconductor wafer. In particular, the invention relates to the field of etching, cleaning, and drying a semiconductor wafer with a patterned layer to fabricate bottom electrode structures on a semiconductor wafer and to cleaning and / or drying the bottom electrode structures. BACKGROUND [0003] One goal in the manufacture of integrated circuits is to continuously decrease feature sizes of the fabricated components. For certain components, like capacitors, shrinking adversely affects the properties of the component. In order to achieve a desired value of...

Claims

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Application Information

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Patent Type & AuthorityApplications(United States)
IPC IPC(8): H01L21/20
CPCH01L21/31111H01L27/10852H01L28/91H10B12/033A61H9/0092A61H2201/0103A61H2201/1238
InventorDUPONT, AUDREYHOYER, RONALD
OwnerINFINEON TECH AG