Method and system for fabricating and cleaning free-standing nanostructures
a free-standing nanostructure and nano-structure technology, which is applied in the field of systems and corresponding methods for fabricating and cleaning free-standing nanostructures on semiconductor wafers, can solve the problems of insufficient charge stored in storage capacitors to produce detectable signals, loss of information stored in memory cells, and adversely affecting the properties of components, etc., to achieve the effect of reducing the number of etching steps, and reducing the number of etching tim
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[0027] Exemplary embodiments of methods and systems according to the invention are discussed in detail below. It is appreciated, however, that the present invention provides many applicable inventive concepts that can be embodied in a wide variety of specific contexts. The specific embodiments discussed are merely illustrative of specific ways to apply the method and the system of the invention, and do not limit the scope of the invention.
[0028] In particular, the following embodiments are described in the context of fabricating bottom electrode structures for stacked capacitor DRAM cells and surrounding gate transistors for a vertical cell technology. In both technologies, free-standing nanostructures are formed as protruding elements on the surface of a semiconductor wafer having, in accordance with present technologies, a height to width ratio in excess of 20. It should be noted, however, that the inventive methods and systems can be applied for other high aspect ratio nanostruc...
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