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Parallel data processing apparatus

a data processing apparatus and parallel technology, applied in the direction of memory adressing/allocation/relocation, instruments, and architectures with multiple processing units, can solve the problems of large proportion of processing elements remaining unused, inefficient simd architecture, and increasing data processing speed

Inactive Publication Date: 2009-08-06
RAMBUS INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

In addition, users of such systems are demanding that the speed of data processing is increased.
However, the SIMD architecture can be inefficient when a system has to process a large number of relatively small data item groups.
In that case, a large proportion of the processing elements may remain unused while data is being processed for a particular group.

Method used

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Examples

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Embodiment Construction

[0023]The data processing system described below is a graphics data processing system for producing graphics images for display on a screen. However, this embodiment is purely exemplary, and it will be readily apparent that the techniques and architecture described here for processing graphical data are equally applicable to other data types, such as video data. The system is of course applicable to other signal and / or data processing techniques and systems.

[0024]An overview of the system will be given, followed by brief descriptions of the various functional units of the system. A graphics processing method will then be described by way of example, followed by detailed description of the functional units.

Overview

[0025]FIG. 1 is a system level block diagram illustrating a graphics data processing system 3. The system 3 interfaces with a host system (not shown), such as a personal computer or workstation, via an interface 2. Such a system can be provided with an embedded processor un...

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PUM

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Abstract

A controller for controlling a data processor having a plurality of processor arrays, each of which includes a plurality of processing elements, comprises a retrieval unit operable to retrieve a plurality of incoming instructions streams in parallel with one another, and a distribution unit operable to supply such incoming instruction streams to respective ones of the said plurality of processor arrays.

Description

CROSS REFERENCE TO RELATED APPLICATIONS[0001]This application is a continuation of U.S. patent application Ser. No. 11 / 621,952, which is a continuation-in-part of U.S. patent application Ser. No. 09 / 972,797 filed Oct. 9, 2001, which is a continuation of PCT / GB00 / 01332, filed Apr. 7, 2000, each of which are herein incorporated in their entirety by this reference thereto.FIELD OF THE INVENTION[0002]The present invention relates to parallel data processing apparatus, and in particular to single instruction multiple data (SIMD) processing apparatus.BACKGROUND OF THE INVENTION[0003]Increasingly, data processing systems are required to process large amounts of data. In addition, users of such systems are demanding that the speed of data processing is increased. One particular example of the need for high speed processing of massive amounts of data is in the computer graphics field. In computer graphics, large amounts of data are produced that relate to, for example, geometry, texture, and...

Claims

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Application Information

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Patent Type & Authority Applications(United States)
IPC IPC(8): G06F15/80G06F12/08G06F9/02
CPCG06F9/3001G06F9/3004G06F9/30087G06F9/30101G06F9/3851G06F9/3838G06F9/3887G06F15/8007G06F15/8015G06T1/20G06F9/3885G06F9/3888G06F9/30
Inventor STUTTARD, DAVEWILLIAMS, DAVEO'DEA, EAMONFAULDS, GORDONRHOADES, JOHNCAMERON, KENATKIN, PHILWINSER, PAULDAVID, RUSSELLMCCONNELL, RAYDAY, TIMGREER, TREY
Owner RAMBUS INC
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