Fast tracking for flash channels

Abstract

An SSD controller dynamically adjusts read thresholds in an NVM to reduce errors due to device threshold voltage distribution shifts, thus improving performance, reliability, and / or cost of a storage sub-system, such as an SSD. In a first aspect, the controller periodically performs offline tracking on a portion of the NVM. The controller reads a representative sub-portion with current read thresholds. If the read meets a condition, then the controller reads the sub-portion with sample read thresholds, estimates the device threshold voltage distributions, and adjusts the current read thresholds of the portion to calculated new operating read thresholds of the sub-portion. In a second aspect, the portion includes data with a known statistical average number of zero and / or one bits.

Description

CROSS REFERENCE TO RELATED APPLICATIONS[0001]Priority benefit claims for this application are made in the accompanying Application Data Sheet, Request, or Transmittal (as appropriate, if any). To the extent permitted by the type of the instant application, this application incorporates by reference for all purposes the following applications, all commonly owned with the instant application at the time the invention was made:[0002]U.S. Non-Provisional Application (Docket No. SF-11-02 and Ser. No. 13 / 464,433), filed 4 May 2012, first named inventor Earl T COHEN, and entitled ZERO-ONE BALANCE MANAGEMENT IN A SOLID-STATE DISK CONTROLLER.BACKGROUND[0003]1. Field[0004]Advancements in non-volatile storage technology are needed to provide improvements in performance, efficiency, and utility of use.[0005]2. Related Art[0006]Unless expressly identified as being publicly or well known, mention herein of techniques and concepts, including for context, definitions, or comparison purposes, should...

AI Technical Summary

Problems solved by technology

However, there is no single operation that directly provides this balance, given that 4LCs are generally read via separate array accesses using the three read voltage references: VREAD2 for lower pages and VREAD1 and VREAD3 for upper pages.

In some embodiments where the range of device threshold voltage adjustment is limited, it may not be possible to find the true peak.

In various embodiments and / or usage scenarios, the device threshold voltage distributions in an NVM shift over time and cause a read error (e.g. when hard-decision decoding).

As the device threshold voltage distributions shift, values that were previously below (or above) a certain read threshold, fall above (or below) the certain read threshold and cause a bit error.

E.g. a value previously stored as (and considered to be in) the D1 distribution, is determined to be in the D2 distribution, thus resulting in a bit error.

A small number of bit errors are correctable; however a sufficient number of bit errors causes an uncorrectable (e.g. hard-decision decode) error.

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