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Semiconductor device and method of manufacturing the same

a technology of semiconductors and shielding devices, applied in the direction of semiconductor devices, electrical equipment, transistors, etc., can solve the problems of high-voltage nmos not meeting the esd protection requirements, eeprom electrostatic damage may occur, and conventional esd protection devices often fail to provide adequate esd protection

Inactive Publication Date: 2015-09-17
SEMICON MFG INT (SHANGHAI) CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

The patent text describes a method of manufacturing a semiconductor device that includes a high-voltage NMOS device for electrostatic discharge protection. The method includes steps of forming a p-type doped region in the drain of the high-voltage NMOS, and then adding a dielectric layer over the substrate with at least one contact hole. The technical effect of this method is to provide better protection against electrostatic discharge in semiconductor devices.

Problems solved by technology

However, conventional ESD protection devices often fail to provide adequate ESD protection for the EEPROM.
The high-voltage NMOS may be unable to meet the ESD protection requirements under certain conditions.
As a result, electrostatic damage to the EEPROM may occur under the above conditions.

Method used

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  • Semiconductor device and method of manufacturing the same
  • Semiconductor device and method of manufacturing the same
  • Semiconductor device and method of manufacturing the same

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Embodiment Construction

[0031]Various embodiments of the inventive concept are next described in detail with reference to the accompanying drawings. It is noted that the following description of the different embodiments is merely illustrative in nature, and is not intended to limit the inventive concept, its application, or use. The relative arrangement of the components and steps, and the numerical expressions and the numerical values set forth in these embodiments do not limit the scope of the inventive concept unless otherwise specifically stated. In addition, techniques, methods, and devices as known by those skilled in the art, although omitted in some instances, are intended to be part of the specification where appropriate. It should be noted that for convenience of description, the sizes of the elements in the drawings may not be drawn to scale.

[0032]In the drawings, the sizes and / or relative sizes of layers and regions may be exaggerated for clarity. Like reference numerals denote the same elemen...

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Abstract

A semiconductor device is provided. The semiconductor device includes a semiconductor substrate and an electrostatic discharge (ESD) protection device disposed on the semiconductor substrate. The ESD protection device includes a source and a drain disposed in the semiconductor substrate, a gate disposed on the semiconductor substrate between the source and the drain, and a p-type doped region disposed in the drain.

Description

CROSS-REFERENCE TO RELATED APPLICATION[0001]This application claims priority to Chinese Patent Application No. 201410088289.7 filed on Mar. 11, 2014, the disclosure of which is incorporated herein by reference in its entirety.BACKGROUND[0002]1. Technical Field[0003]The present disclosure relates to the field of semiconductor technology, and more particularly to a semiconductor device and a method of manufacturing the same.[0004]2. Description of the Related Art[0005]In the field of semiconductor technology, electrically erasable programmable read-only memory (EEPROM) is a type of non-volatile storage device that is widely used in computers, mobile phones and other electronic devices.[0006]Electrostatic discharge (ESD) protection is necessary to protect the EEPROM since the EEPROM and other semiconductor devices are often operated in different environments and under various conditions. In a conventional EEPROM, a high-voltage n-type metal-oxide-semiconductor (NMOS) with a rated worki...

Claims

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Application Information

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IPC IPC(8): H01L27/115H01L21/8238H01L27/02
CPCH01L27/11526H01L21/823857H01L27/0266H01L29/66659H01L29/7835H01L29/0847H01L21/823814
Inventor WANG, XIAOYUANZHOU, CHUANMIAOJIN, FENGJILI, HONGWEIGUO, BINGGUO, ZHIGUANG
Owner SEMICON MFG INT (SHANGHAI) CORP