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Semiconductor memory apparatus having open bit line structure

a memory apparatus and open-bit technology, applied in the field of semiconductor memory apparatuses, can solve problems such as becoming increasingly difficul

Active Publication Date: 2017-05-11
SK HYNIX INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

The disclosure is about a semiconductor memory apparatus that allows a sense amplifier to compare one bit line of a normal array with two or more bit lines of a dummy array and sense it. This helps improve the performance and reliability of the semiconductor memory apparatus. Additionally, the disclosure describes different embodiments and arrangements of the components of the semiconductor memory apparatus, which can be adapted based on specific needs and requirements.

Problems solved by technology

To further increase the storage capacity more memory cells should be sufficiently secured in the same area, however, this is becoming increasingly more difficult because of the already high degree of integration.

Method used

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  • Semiconductor memory apparatus having open bit line structure
  • Semiconductor memory apparatus having open bit line structure
  • Semiconductor memory apparatus having open bit line structure

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Embodiment Construction

[0012]Hereinafter, various embodiments will be described in detail with reference to the accompanying drawings. In the drawings, thicknesses and lengths of components may be exaggerated for convenience of illustration. In the following description, a detailed explanation of related functions and constitutions may be omitted for simplicity and conciseness. Like reference numerals refer to like elements throughout the specification and drawings.

[0013]It is also noted that in this specification, “connected / coupled” refers to one component not only directly coupling another component but also indirectly coupling another component through an intermediate component.

[0014]Referring now to FIG. 1, a semiconductor memory apparatus 1 is provided, according to an embodiment of the invention. The semiconductor memory apparatus 1 may include a volatile memory apparatus. The volatile memory apparatus may include a static random access memory (RAM), a dynamic random access memory (RAM), a synchron...

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Abstract

A semiconductor memory apparatus may include a memory bank having a plurality of memory cell arrays. The memory bank may have an open bit line structure. A sense amplifier array may be coupled in common with adjacent memory cell arrays. A sense amplifier coupled in common with a dummy array and a normal array may be coupled with one bit line disposed in the normal array and two bit lines disposed in the dummy array.

Description

CROSS-REFERENCES TO RELATED APPLICATION[0001]The present application claims priority under 35 U.S.C. §119(a) to Korean application number 10-2015-0155940, filed on Nov. 6, 2015, in the Korean Intellectual Property Office, which is incorporated herein by reference in its entirety.BACKGROUND[0002]1. Technical Field[0003]Various embodiments of the disclosure relate generally to a semiconductor apparatus and, more particularly, to a semiconductor memory apparatus.[0004]2. Related Art[0005]Generally, a semiconductor memory apparatus such as a dynamic random access memory (RAM) includes a plurality of memory cell arrays. The plurality of memory cell arrays include a plurality of memory cells for storing data. The memory cells may be accessed through controlling word lines and bit lines.[0006]As a semiconductor memory apparatus is highly integrated, it can store a large amount of data in a small area. To further increase the storage capacity more memory cells should be sufficiently secured...

Claims

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Application Information

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IPC IPC(8): G11C8/10G11C7/06
CPCG11C8/10G11C7/065G11C7/062G11C7/02G11C7/14G11C11/4091G11C11/4099
Inventor WOO, JAI YONG
Owner SK HYNIX INC