Ferroelectric random access memory (FERAM) array with segmented plate lines that are electrically-isolated from each other
a ferroelectric random access memory and array technology, applied in the field of memory circuits, can solve the problems of increasing unnecessary power consumption, imposing significant size penalties, and reducing the endurance of feram array b,
Active Publication Date: 2018-05-03
AUCMOS TECH USA INC
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Benefits of technology
The present invention relates to a design for a ferroelectric random access memory (FeRAM) array. The array includes two sections of FeRAM cells sharing a common plate line and word line. The two sections are electrically unconnected, and only one section is selected for a read operation at any given time. Each section has a plate line selection cell that connects the plate line to a queue of cells. Each FeRAM cell in each section is read or written over a pair of bit lines running perpendicular to the word line, and the plate line selection line runs parallel to the bit lines. The plate line selection cell is designed differently from a conventional FeRAM cell, having a conductive material instead of a ferroelectric material. The invention allows for separate reading of data stored in each section using a set of sense amplifiers and multiplexers. The technical effect of the invention is improved performance and reliability of the FeRAM array.
Problems solved by technology
As FeRAM cells programmed in the “1” state have to be restored following the read operation, the unnecessary data-restoring write operation reduces the endurance of FeRAM array 150 and increase unnecessary power consumption
Such constraint imposes a significant size penalty.
Method used
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[0019]The harm to endurance by unnecessary data-restoring writes is virtually eliminated by segmenting the plate lines, such that each plate line is shared by a relatively smaller number of FeRAM cells (e.g., 16 or 32), rather than thousands.
[0020]FIG. 2(a) shows FeRAM array 300 with segmented plate lines, in accordance with one embodiment of the present invention. As shown in FIG. 2(a), unlike FeRAM 150 of FIG. 1(d), different sections of FeRAM cells in FeRAM array 300 are selected by the same word line selection signal WLi, but are provided different, shorter plate lines activated by plate line signals PLij. FIG. 2(a) shows section k of FeRAM array 300, which includes PL select line 301 running in a transverse direction to the segmented plate lines (i.e., PL select line 301 runs parallel to the bit lines). When section k is selected, plate line select transistor 303 connects section k's segmented plate line to PL select line 301, such that plate line signal PLik for section k is r...
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A ferroelectric random access memory (FeRAM) array includes (a) a first section of FeRAM cells sharing a first plate line and a word line; and (b) a second section of FeRAM cells sharing a second plate line and the word line, wherein the first plate line and the second plate line are electrically unconnected, and wherein only the first section of FeRAM cells or the second section of FeRAM cells, but not both, are selected for a read operation at any given time. In each section of the FeRAM cells, a plate line selection cell connects the corresponding plate line to a plate line selection line. Each FeRAM cell in each section is read or written over a pair of bit lines running in a direction transverse to the word line of the section, and the plate line selection line runs along a direction parallel to the bit lines.
Description
CROSS REFERENCE TO RELATED APPLICATIONS[0001]The present application relates to and claims priority of U.S. provisional patent application (“Provisional Application”), Ser. No. 62 / 414,765, entitled “Segment Plateline of Ferroelectric Memory Array,” filed on Oct. 28, 2016. The disclosure of the Provisional Application is hereby incorporated by reference in its entirety.BACKGROUND OF THE INVENTION1. Field of the Invention[0002]The present invention relates to memory circuits. In particular, the present invention relates to an efficient organization of a ferroelectric random access memory (FeRAM) array.2. Discussion of the Related Art[0003]A ferroelectric random access memory (FeRAM) cell stores data in a capacitor using the memory property of a ferroelectric material. FIG. 1(a) is a schematic diagram showing FeRAM circuit 100. As shown in FIG. 1(a), FeRAM circuit 100 includes an array of FeRAM cells. For illustration purpose, FeRAM array 100 of FIG. 1(a) is represented by FeRAM cells ...
Claims
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CPCG11C11/2273G11C11/2257G11C11/2255G11C11/2275G11C11/2253G11C11/2259G11C2207/002
InventorYAN, TIANHONG
OwnerAUCMOS TECH USA INC