Reduced-area architecture for padded-protocol interface
a technology of padded information and interface, applied in the field of circuitry, can solve problems such as the challenge of serial communication of padded information
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[0018]A previously known data converter 10 in accordance with the aforementioned IEEE standard, and its state machine, are shown in FIGS. 1 and 2. As seen in FIG. 1, the encoded or padded data to be decoded (after reception and processing through a gearbox as described above) move along the lower signal path 11, while control signals move along the upper signal paths 12, 13.
[0019]In a first clock cycle, a first group or sample of padded data arrives at 100, where it is stored in buffer 101, and also directed to combinatorial function 15 where data type information 150 needed for decoding is derived. In a steady state, data type information 150 is used in state machine 16 with other data type information from previous samples to direct the operation of decoder 17. However, if the system has just been started, nothing will be done with these data or data type information.
[0020]In a second clock cycle, the first sample arrives at 102 and is stored in buffer 103, and in addition is dire...
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