Extended cardbus/PC card controller with split-bridge technology

Abstract

An improved extended cardbus / PC card controller (20) incorporating proprietary Split-Bridge™ high speed serial communication technology for interconnecting a conventional parallel system bus via a high speed serial link with a remote peripheral device. The extend cardbus / PC card controller is adapted to interface the parallel system bus, which may be PCI, PCMCIA, integrated, or some other parallel I / O bus architecture, with peripheral devices via PC cards, and now optionally via a high speed serial link using the proprietary serial Split-Bridge™ technology. The serial Split-Bridge™ technology provides real time interconnection between the parallel system bus and the remote device which may also be based on a parallel system data bus architecture, over a serial link, which serial link appears to be transparent between the buses and thus facilitates high speed data transfer exceeding data rates of 1.0 GigaHertz.

Description

CROSS REFERENCE TO RELATED APPLICATIONS[0001]This application claims priority of provisional patent application serial No. 60 / 198,317 entitled Split-Bridge Systems, Applications and Methods of Use filed on Apr. 19, 2000, as well as co-pending and commonly assigned patent applications Ser. No. 09 / 130,057 filed Jun. 6, 1998, Ser. No. 09 / 130,058 filed Jun. 6, 1998, Ser. No. 08 / 679,131 now issued as U.S. Pat. No. 5,941,965; and co-pending patent application Ser. No. 09 / 559,678, entitled Modular Computer Based on Universal Connectivity Station, the teachings of each incorporated herein by reference.FIELD OF THE INVENTION[0002]The present invention is generally related to data processing systems, and more particularly to computer systems having at least one host processor and connectable to a plurality of peripherals devices including notebook computers, storage devices, displays, keyboards, mouse's and so forth.BACKGROUND OF THE INVENTION[0003]Computer systems today are powerful, but are...

AI Technical Summary

Benefits of technology

[0018]The present invention achieves technical advantages as an improved extended cardbus / PC card controller incorporating the proprietary serial high speed Split-Bridge™ technology providing serial communications between a parallel system bus and a remote peripheral device. The improved controller includes the conventional system frontside controls, I / O controls, a cardbus translator having PC card slots adapted to receive a PCMCIA card or cards, and one end of the split bridge serial communication link comprising the proprietary serial Split-Bridge™ technology. The controller may further include super I / O circuitry for communicating remote I / O devices with the system bus as the super I / O devices become more readily available in the market.

Problems solved by technology

Computer systems today are powerful, but are rendered limited in adapting to changing computing environments.

The PCI bus is pervasive in the industry, but as a parallel data bus is not easily bridged to other PCI based devices.

However, separating the laptop computer from the docking station a significant distance has not been possible.

Thus, upgrading processing power usually meant significant costs and / or replacing the computer system.

Prior to PCI 2.1 these artifacts could and did occur because devices could get on the bus and hold it for indefinite periods of time.

Before modification of the spec for version 2.1, there really was no way to guarantee performance of devices on the bus, or to guarantee time slot intervals when devices would get on the bus.

As it turns out Ethernet also requires some guaranteed dead time between operations to “mostly” prevent collisions from other Ethernet devices on the widely disperse bus, and that dead time further reduces the average performance.

Small transfers across all of these protocols, while possible, are extremely expensive from a bandwidth point of view.

Of course the possibility of isochronous operation on the more general serial bus is not very reasonable.

It now becomes reasonable to explore some of the old fundamentals, like peer-to-peer communication between computers that has been part of the basic PCI specification from the beginning, but never really feasible because of the physical limits of the bus prior to Split-Bridge™ technology.

Conceptually, a PCI bridge was never intended to be resident in two separate modules or chips and no mechanism existed to allow the sharing of setup information across two separate and distinct devices.

The problem exists when the north and south portions are physically and spatially separated and none of the register information is available to the south side because all the registers are in the north chip.

However, merely creating a separate set of registers in the south port would still leave the set up of those registers to the initialization code of the operating system and hence would have required a change to the system software.

Secondly, the actual protocol in the Split-Bridge™ technology is quite unique and different from the typical state of the art for serial bus operations.

The problem as it relates to PCI is that the complete length of a given transfer must be known before a transfer can start so the proper packet header may be sent.

Earlier attempts to accomplish anything similar to Split-Bridge™ technology failed because the PCI bus does not inherently know from one transaction to the next when, or if, a transfer will end or how long a block or burst of information will take.

In essence the protocol for the parallel PCI bus (and all other parallel, and or real time busses for that matter) is incompatible with existing protocols for serial buses.

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