3 results about "High speed serial link" patented technology

This invention relates to the field of protocol conversion and transmission technology, specifically an FPGA-based AFDX to Aurora protocol transmission and conversion system. The system includes: an AXI-AFDX module responsible for parsing and encapsulating standard AFDX frame signals, and separating AFDX control signals from data signals; an AFDX over Aurora module that achieves cross-clock domain synchronization by storing control and data signals separately in dual FIFOs, extracting frame groups in an orderly manner based on virtual link static priority scheduling and same-priority polling mechanisms, and encapsulating them into IP frame format with extended fields to ensure that critical AFDX control information is not lost during Aurora transmission; and an Aurora protocol module that performs bidirectional conversion between IP frame signals and Aurora protocol high-speed serial signals, adapting to external GT high-speed interfaces. This invention achieves reliable transmission to high-speed serial links.

This invention discloses a low-latency data exchange method and related apparatus for real-time simulation systems, belonging to the field of data exchange technology. The method includes: initializing the real-time simulation system, which includes simulation nodes, exchange nodes, and a master control node; the simulation nodes construct dynamically long data packets based on the simulation results to be exchanged and send the dynamically long data packets via a high-speed serial link; the exchange nodes receive the dynamically long data packets and, based on the system-level physical topology, forward the dynamically long data packets using a small packet fast transmission mechanism and a bufferless direct-pass transmission mechanism; the target simulation node receives the dynamically long data packets and performs deterministic parsing on them. This method and related apparatus can reduce the latency of data exchange in real-time simulation systems and ensure the determinism of data transmission.

A first device includes training logic configured to autonomously train a link coupled between the first device and a second device without software intervention. The training logic transmits a message on a first portion of the link to the second device, the message associated with training a second portion of the link. The training logic receives training data on the second portion of the link from the second device in response to the message and trains the second portion of the link based on the training data. In some embodiments, a first device includes processing circuitry and a serializer / deserializer, wherein the processing circuitry trains a high-speed serial link in a first direction between the first device and a second device, and sends or receives a first sideband message on the high-speed serial link in a second direction that is opposite to the first direction.