71 results about "Parallel I/O" patented technology

A file server architecture is disclosed, comprising as separate processors, a network controller unit, a file controller unit and a storage processor unit. These units incorporate their own processors, and operate in parallel with a local Unix host processor. All networks are connected to the network controller unit, which performs all protocol processing up through the NFS layer. The virtual file system is implemented in the file control unit, and the storage processor provides high-speed multiplexed access to an array of mass storage devices. The file controller unit control file information caching through its own local cache buffer, and controls disk data caching through a large system memory which is accessible on a bus by any of the processors.

The invention discloses a data parallelism compression method. The data parallelism compression method comprises the step of reading, namely, data to be compressed are read from a memory device through an I / O, the step of segmenting, namely, data to be compressed are evenly segmented into N data blocks which are stored in an input buffering area corresponding to each data block, the step of compressing and encoding, namely, processes control the data blocks in the corresponding input buffering areas, the data blocks are compressed and encoded through a multithreading method, and the data which are compressed and encoded are stored in an output buffering area, and the step of writing, the data which are compressed and encoded in all processes in the output buffering area are merged, and the merged data are written to an output file. According to the data parallelism compression method, an ideal compression ratio is obtained, time for compressing is greatly shortened, the data parallelism compression method can be well applied to a cloud storage or database system, the problem of low compression timeliness is solved, and whole performance of compression is improved.

A semiconductor memory device includes: a plurality of ports configured to perform a serial input / output (I / O) data communication with external devices; a plurality of banks configured to perform a parallel I / O data communication with the ports; a global data bus configured to transmit a signal between the banks and the ports; a test mode determiner configured to determine an operation mode of the semiconductor memory device by generating a test mode enable signal in response to a test mode control signal; a test I / O controller configured to transmit and receive a test signal with the ports in response to the test mode enable signal during a port test mode; and a plurality of selectors, each of which is configured to receive the test signal output from the corresponding port in series and feedback the test signal to the corresponding port.

The invention relates to a digital protection tester with a fault data model base for protection testing, comprising an ARM (Advanced RISC Machines) processor, a DSP (digital signal processor), 8 inputs and 4 outputs, a FT3 plate, and a GPS (global positioning system) interface, wherein the ARM processor is connected with a host computer through an Ethernet interface, and are respectively connected three optical interfaces (A,B, C) to output data messages to a digital protection device to be tested through the Ethernet; the DSP is connected with the ARM processor through an HPI (hardware platform interface); the 8 input paths and 4 output paths are hung an external parallel I / O bus of the DSP; the FT3 plate is hung on the external parallel I / O bus of the DSP; the FT3 plate on an FPGA (Field Programmable Gate Array) has 12 weak signal output terminals and 3 groups of message output terminals and optical B-code interfaces meeting the standard of IEC60044-8; and the GPS interface is connected with the ARM processor; and the digital protection tester also has an abnormal data restoration and reproduction device. The digital protection tester can determine the effectiveness of the malfunction prevention measures of the digital protection device according to the fault data model base, thereby perfecting the performance of the digital protection device.

The invention discloses a distributed file management system based on seismic data processing, which includes data read-write interfaces, a file management server and communication modules, wherein the communication modules are provided with interfaces for information receiving and transmission, which are utilized by the data read-write interfaces and the file management server. The invention has the benefits as follows: the distributed file system principle is adopted to automatically slice and manage files, so as to realize the high-speed paralleling I / O and provide simple and efficient file management; users only simply call the corresponding interface to realize operation for data, and files can be sliced and managed completely and automatically through programs without manual intervention; the problem of competition conflict that a plurality of computation nodes access the same file on a unified magnetic disc array under the cluster environment can be solved; and the method for slicing the files fundamentally solves the problem of sharp performance reduction of I / O caused by the file locking protection of a file system.

In one embodiment, a method includes using an owner gateway node to write data for a fileset, determining whether to utilize other gateway nodes to handle a portion of write traffic for the fileset, selecting a set of eligible gateway nodes based on: a current internal workload, a network workload, and recent performance history data in regard to workload distribution across the other gateway nodes, assigning and defining a size for one or more write task items for each gateway node in the set based on a current dynamic profile of each gateway node, providing availability to in-memory and / or I / O resources at each gateway node in the set to handle assigned write task items, and distributing workload to the set of eligible gateway nodes according to the size for each of the assigned write task items for each individual gateway node in the set of eligible gateway nodes.

A multi-port memory device having a plurality of ports performing a serial input / output (I / O) communication with external devices, and a plurality of banks performing a parallel I / O communication with the ports through a plurality of global I / O lines. The multi-port memory device includes: a write clock generating unit for generating a write clock selectively toggled only while write data are applied; a write control unit for generating a write flag signal group and a write driver enable signal in response to the write clock and a write command; a data latch unit for outputting intermediate write data by storing burst write data under the control of the write flag signal group; and a write driver for receiving the intermediate write data to write final write data in a memory cell of a corresponding bank in response to the write driver enable signal and a data mask signal group.

A method for processing a point-in-time copy of data associated with a logical storage volume where the data to be copied is stored in a striped or parallelized fashion across more than one physical source volume. The method includes receiving a point-in-time copy command concerning a logical volume and distributing the point-in-time copy command in-band to each of the physical source volumes containing a portion of the striped data. The method also includes establishing a point-in-time copy relationship between each physical source volume and one of a corresponding set of multiple physical target volumes. The method further includes copying the data stored on each physical source volume to the corresponding physical target volume. The in-band copy command and the striped data may be distributed over I / O channels between a server and the physical storage and processed sequentially.

The invention discloses a wireless data transmission device based on a WSN (wireless sensor network), a GPRS (general packet radio service) and a GPS (global position system). The wireless data transmission device mainly comprises a GPRS RF (radio frequency) module, a ZigBee RF module, a GPS module, a 32-bit ARM (automatic route management) processor and a power management module, wherein the ARM processor is a connecting link among the modules; and the ARM processor is connected with the GPRS RF module by a UART1 (universal asynchronous receiver / transmitter), connected with the ZigBee RF module by an SPI (serial peripheral interface), and connected with the GPS module by a UART0. In addition, for improving the reliability of the device and ensuring the reliable forwarding of massive data, the device also can comprise an NAND FLASH memory which is directly connected with the ARM processor by parallel I / O interfaces. By using the device disclosed by the invention, the transmission of remote WSN monitoring data is facilitated, the reliability of WSN data transmission is improved, the design cost is saved, the anti-interference performance of the system is improved, and the time synchronization of data information is guaranteed by using the GPS module.

In one embodiment, a method for providing parallel reading in a clustered file system having cache storage includes using an owner gateway node to read data for a fileset, determining whether to utilize other gateway nodes to handle a portion of read traffic for the fileset, selecting a set of eligible gateway nodes based on: a current internal workload, a network workload, and recent performance history data regarding workload distribution across the other gateway nodes, assigning and defining a size for read task items for each gateway node in the set based on a current dynamic profile of each gateway node in the set, providing in-memory and / or input / output resources at each gateway node in the set to handle assigned read task items, and distributing workload to the set of eligible gateway nodes according to the size for the assigned read task items for each gateway node in the set.

A method for processing a point-in-time copy of data associated with a logical storage volume where the data to be copied is stored in a striped or parallelized fashion across more than one physical source volume. The method includes receiving a point-in-time copy command concerning a logical volume and distributing the point-in-time copy command in-band to each of the physical source volumes containing a portion of the striped data. The method also includes establishing a point-in-time copy relationship between each physical source volume and one of a corresponding set of multiple physical target volumes. The method further includes copying the data stored on each physical source volume to the corresponding physical target volume. The in-band copy command and the striped data may be distributed over I / O channels between a server and the physical storage and processed sequentially.

The invention discloses a method for supporting the parallel input and output (I / O) of trace files in parallel simulation, in particular to a method for supporting the distributed parallel I / O of the Trace files in order to improve the I / O efficiency and the simulation precision of the Trace files in the parallel simulation. The technical scheme comprises the following steps: a host machine for running parallel simulators is constructed and comprises a main control node and simulation nodes; a main configuration program is executed on the main control node for global configuration; then, scheduling software A on the main control node schedules a simulator A on a simulation node to execute a simulation job; afterwards, Trace distribution software on the main control node generates and sends Trace mobile scripts to all destination simulation nodes, and each destination simulation node executes a Trace mobile script and moves a Trace file from a corresponding source node to the own node; and finally, scheduling software B on the main control node schedules a simulator B on a simulation node to execute a simulation job. The method can greatly improve the I / O efficiency of the Trace files and the simulation precision.

A multi-port memory device includes a plurality ports, a plurality of banks, a plurality of global data buses, first and second I / O controllers, and a test input / output (I / O) controller. The ports perform a serial I / O data transmission. The banks perform a parallel I / O data transmission with the ports. The global data buses are employed for transmitting data between the ports and the banks. The first I / O controller controls a serial data transmission between the ports and external devices. The second I / O controller controls a parallel data transmission between the ports and the global buses. The test I / O controller generates test commands based on a test command / address (C / A) inputted from the external devices and transmits a test I / O data with the global data bus during a test operation mode.

A software enabled control method that allows dynamic configuration of the operation of a control system. The configuration can be done in a factory calibration or while the system is running in the field in communication with a Host computer. The Host computer may communicate through a serial or parallel I / O. Because the control system has an expert system with built-in mathematical models and intelligence for the system with luminent devices, once the software enabled control system has been configured and given set points for desired target performance, it will regulate performance of the system with a luminent device in a manner that does not require intervention of the Host computer. The system contains performance optimization monitors based on predetermined criteria. The results of the monitors are available to the user or a Host computer through one of the available I / Os. The present invention allows flexibility to address various luminent devices using the same software architecture and similar algorithms. The present invention has a control system that can be configured to address a specific luminent device allowing for compensation of manufacturing. The control system also has algorithms that can be dynamically changed in light of changing environmental conditions.

In one embodiment, a method includes using an owner gateway node to write data for a fileset, determining whether to utilize other gateway nodes to handle a portion of write traffic for the fileset, selecting a set of eligible gateway nodes based on: a current internal workload, a network workload, and recent performance history data in regard to workload distribution across the other gateway nodes, assigning and defining a size for one or more write task items for each gateway node in the set based on a current dynamic profile of each gateway node, providing availability to in-memory and / or I / O resources at each gateway node in the set to handle assigned write task items, and distributing workload to the set of eligible gateway nodes according to the size for each of the assigned write task items for each individual gateway node in the set of eligible gateway nodes.

A technique for adjusting a communication system involves a link, where the link includes a data line arranged to transmit a data signal and a clock line adapted to transmit a clock signal. The technique uses one or more counters to test the transmission across the link. Dependent on one or more of these counters, a test circuit, connected to the link, compares a known test pattern signal to a latched test pattern signal transmitted on the data line. The test circuit includes an adjustment circuit arranged to generate an adjustable clock signal from the clock signal, where the adjustable clock signal determines when to latch the transmitted test pattern signal The test circuit adjusts a timing of the adjustable clock signal relative to the data signal of the link.

The invention provides an I / O parallel acceleration method and device for an ROMS mode in a regional coupling forecasting system and a computer readable storage medium, and relates to the technical field of the regional coupling forecasting system. The I / O parallel acceleration method comprises the steps: dividing the number of global grids in the x direction and the y direction and the number ofprocesses in the x direction and the y direction; constructing a one-to-one mapping relation between input and output data of each computing process and the integral input and output file, and constructing a mapping relation between the computing processes and I / O process data transmission; reading the file data in parallel by the I / O process and distributing the data to each computing process; and calculating a result by the ROMS, collecting data from each calculation process by the I / O process and storing the data in parallel. In the I / O parallel acceleration method, parallel I / O input and output are designed in the ROMS marine computing mode, and an ROMS bottom layer I / O framework is optimized, and the I / O performance of the ROMS in the marine mode is improved.

A multi-port memory device includes a plurality of serial I / O data pads for providing a serial input / output (I / O) data communication; a plurality of ports for performing the serial I / O data communication with external devices through the serial I / O data pads; a plurality of banks for performing a parallel I / O data communication with the ports; a plurality of first data buses for transferring first signals from the ports to the banks; a plurality of second data buses for transferring second signals from the banks to the ports; and a switching unit for connecting the first data buses with the second data buses in response to a control signal.

The invention discloses a multiple-serial-port bus system based on AT91M40800, which includes a micro-controller unit, an Ethernet interface unit, a CANBUS interface, a RS-485 interface unit, and an infrared remote interface unit. The Ethernet interface unit and CANBUS interface unit are connected with the micro-controller unit through a parallel bus, the RS-485 interface unit connected with the micro-controller unit through a serial bus, and the infrared remote interface unit connected with the micro-controller unit through parallel I / O interface. A third-party device is connected with the current inspection and monitor network through the multi-port system, which keeps clear of varied site networks of network interface type and protocol type, thus effectively solving the difficulty that the third-party device can not find access to the present network due to undisclosed techniques, and also the problems of the maintenance, upgrading, supplementation, and selection of inspection and monitor system in coal mines. The invention can avoid repeated purchase of system and equipment, lower investment and repair expense, and improve inspection and monitor system in coal mines. Therefore, the invention is particularly suitable for network connection equipment of inspection and monitor system in coal mines.

The invention discloses a method for improving parallel I / O (input / output) efficiency by reducing inter-progress communication based on progress affinity. The method comprises the following steps of firstly, analyzing a parallel I / O program using Collective I / O as mainstream, and collecting and calculating the node information of a cluster machine and the configuration information of an MPI (message passing interface) program; enabling the system to calculate the matching result of a possible machine node and an agent progress through pre-processing, and determining an optimum matching strategy through a property predicting module; finally, writing the pre-processed matching strategy into a configuration file, namely a machine file. The method has the advantages that after indicating by the experiment result, the configuration is simple, and the optimum progress distributing scheme is determined for the running of the program through the simple and quick pre-processing under the condition of not modifying the original program code, so the inter-progress communication expense is reduced, and the parallel I / O property is improved; the problem of lower parallel I / O efficiency in the existing high-property calculating field is solved, and the property is obviously improved by reducing the inter-progress data communication expense under the condition of no influence on the other deployment of the existing system.

The invention is a microcircuit configured as a compact, radiation hardened, low-power general purpose I / O expander. The expander may be controlled by an external microcontroller or central processing unit through a serial interface. The expander provides a simple solution to miniaturize static parallel I / O signals using a simplified serial interface such as I2C or SPI.

A multi-port memory device includes a plurality of serial I / O data pads for providing a serial input / output (I / O) data communication; a plurality of ports for performing the serial I / O data communication with external devices through the serial I / O data pads; a plurality of banks for performing a parallel I / O data communication with the ports; a plurality of first data buses for transferring first signals from the ports to the banks; a plurality of second data buses for transferring second signals from the banks to the ports; and a switching unit for connecting the first data buses with the second data buses in response to a control signal.

A multi-port memory device includes a plurality of serial I / O data pads for providing a serial input / output (I / O) data communication; a plurality of ports for performing the serial I / O data communication with external devices through the serial I / O data pads; a plurality of banks for performing a parallel I / O data communication with the ports; a plurality of first data buses for transferring first signals from the ports to the banks; a plurality of second data buses for transferring second signals from the banks to the ports; and a switching unit for connecting the first data buses with the second data buses in response to a control signal.

The invention discloses a GPS meteorological sounding meter using a radio frequency to transmit data. The GPS meteorological sounding meter includes a helium balloon and a main body; the main body is hung below the helium balloon; the main body comprises a shell; the shell is internally provided with a circuit board and a battery; a GPS module connected with a GPS antenna, a single-chip microcomputer, a temperature and humidity sensor, and an atmosphere pressure sensor are arranged on the circuit board; a data output end of the GPS module of the GPS antenna is connected to a serial input end of the single-chip microcomputer; the temperature and humidity sensor, the atmosphere pressure sensor are connected with a parallel I / O port of the single-chip microcontroller; a serial output end of the single-chip microcomputer is connected with a wireless data transmission module; the wireless data transmission module is connected with a communication antenna; and the battery is connected with the circuit board by a wire. The helium balloon lifts off and then uses the wireless data transmission module to transmit the meteorological data collected by the temperature and humidity sensor and the atmosphere pressure sensor and the geographic location information collected by the GPS module to the ground information center.

In one embodiment, a method for providing parallel reading in a clustered file system having cache storage includes using an owner gateway node to read data for a fileset, determining whether to utilize other gateway nodes to handle a portion of read traffic for the fileset, selecting a set of eligible gateway nodes based on: a current internal workload, a network workload, and recent performance history data regarding workload distribution across the other gateway nodes, assigning and defining a size for read task items for each gateway node in the set based on a current dynamic profile of each gateway node in the set, providing in-memory and / or input / output resources at each gateway node in the set to handle assigned read task items, and distributing workload to the set of eligible gateway nodes according to the size for the assigned read task items for each gateway node in the set.

Disclosed is apparatus for converting serial to parallel I / O, which comprises: M sequential logic circuits. The sequential logic circuit comprises: a first D trigger for receiving a bit of inputting data, every first D trigger output is connected with the input of next first D trigger; a second D trigger for receiving a bit start control signal and its output is connected to the input of next D trigger; a polyplexer with two inputs for receiving the input data the first D trigger received and a start control signal receiving end for receiving the start control signal the second D trigger received; a D type gating latch for outputting data that are fed back to the other input end of the polyplexer.