8results about How to "Reduce line width" patented technology

The disclosure provides an external cavity quantum cascade laser testing device and method, the device comprising: an external cavity quantum cascade laser, comprising: a gain chip for generating a first light beam; a diffraction grating for diffracting the first light beam to obtain a first diffracted light beam and a second diffracted light beam, the first diffracted light beam propagating to the gain chip along a second direction for increasing the resonance strength of the gain chip; an infrared spectrometer for testing the second diffracted light beam to obtain a test result; wherein the side of the gain chip away from the diffraction grating is a back cavity surface, the side of the gain chip close to the diffraction grating is a front cavity surface, the back cavity surface and the front cavity surface have a first electric field, the back cavity surface and the diffraction grating have a second electric field, and the relative electric field strength of the second electric field relative to the first electric field is at a maximum value. The disclosure determines the optimal length of the external cavity in the device through the relationship between the relative electric field strength and the distance between the back cavity surface and the diffraction grating, and significantly reduces the output laser linewidth.

The method comprises the following steps: providing a substrate; forming a plurality of first electrode structures and a plurality of bit lines in the substrate; wherein the plurality of bit lines extend along a first direction, the first electrode structures and the bit lines are arranged at intervals along a second direction, and the plurality of first electrode structures are arranged in an array; forming an MTJ structure above the first electrode structures; forming an insulating layer above the substrate, wherein the insulating layer covers the substrate and the MTJ structure; forming a plurality of electrode trenches in the insulating layer, wherein the electrode trenches expose the top surface of the MTJ structure and the top surface of the bit lines; and forming a plurality of second electrode structures in the plurality of electrode trenches. The method can reduce the alignment accuracy requirement when preparing the electrode, reduce the process difficulty, and improve the bit line density.

The present application relates to a kind of self-injection terahertz light frequency comb system, wherein, terahertz quantum cascade laser is as light frequency comb source, beat frequency signal generated by self beat frequency is transmitted into first T-type biasing device;First T-type biasing device is used to transmit beat frequency signal to wave divider;Wave divider is used to divide beat frequency signal into two ways, one way is transmitted to circulator and participates in self injection, another way is connected to spectrum analyzer and carries out real-time detection;Circulator is used to keep the one-way transmission of beat frequency signal participating in self injection in loop;Phase shifter is used to phase match beat frequency signal participating in self injection;Second T-type biasing device is used to inject phase-matched beat frequency signal into terahertz quantum cascade laser;Spectrum analyzer is used to detect the self-injection beat frequency signal obtained in real time.The present application can improve the stability of system, meet the requirement as high-frequency optoelectronic oscillator.

This disclosure provides a side-emitting laser and its fabrication method, which can be applied in the field of optoelectronic devices. The side-emitting laser includes: an N-plane metal electrode disposed on a substrate of the side-emitting laser; a resonant cavity disposed on the N-plane metal electrode; and a P-plane metal electrode disposed on the resonant cavity. The P-plane metal electrode includes: a first gain grating disposed at a first end of the P-plane metal electrode; and a second gain grating disposed at a second end of the P-plane metal electrode opposite to the first end. The resonant cavity includes multiple semiconductor layers, each including a refractive index grating layer. The grating periods of the refractive index grating layer, the first gain grating, and the second gain grating are the same. The refractive index grating layer is used to select the mode of the resonant light to obtain mode light. The refractive index grating layer is also used to combine the first gain grating and the second gain grating to increase the mode light, so that the resonant cavity generates laser light with a linewidth less than 10 kHz.

The invention discloses a display panel and a display device. The display panel comprises a substrate, a gate drive circuit and a plurality of sub-pixel circuits. A grid driving circuit of the display panel comprises a plurality of driving units which are arranged in a cascade mode, effective driving units in the driving units are electrically connected with sub-pixel circuits, virtual driving units in the driving units are disconnected with the sub-pixel circuits, and the virtual driving units do not have an output function. The dummy driving units may input shift signals to the corresponding active driving units. Therefore, the partial structure of the virtual driving unit is similar to that of the effective driving unit, so that the etching uniformity of the gate driving circuit can be improved, the deviation of the line width and the thickness of the lines formed by etching in different areas of the gate driving circuit is reduced, and the reliability of the gate driving circuit is improved. And the load uniformity of the shift signals accessed by the plurality of effective driving units can be improved, so that the stability of the display panel can be improved.

This invention discloses a coplanar waveguide structure, comprising: a top cover film, a substrate, and a bottom cover film sequentially bonded together; the top cover film embeds a top reference ground layer for a microstrip line region; the bottom cover film embeds a bottom ground layer for the microstrip line region; the top reference ground layer for the microstrip line region includes: a microstrip line, a first coplanar waveguide line, a second coplanar waveguide line, an edge reference ground line for the coplanar waveguide region, and a middle reference ground line for the coplanar waveguide region; the edge reference ground line for the coplanar waveguide region is located on both sides of the top cover film; the differential line of the microstrip line region, the first coplanar waveguide line, and the second coplanar waveguide line are located between the edge reference ground line for the coplanar waveguide region; the differential line of the microstrip line region is located at both ends of the top cover film and is divided into two along the middle direction of the top cover film to form the first coplanar waveguide line and the second coplanar waveguide line; transition ground holes are provided at both ends of the middle reference ground line for the coplanar waveguide region. The coplanar waveguide structure of this invention can enhance inter-line coupling.

The present disclosure relates to the technical field of semiconductor manufacturing, and particularly relates to a packaging substrate and a preparation method thereof. The packaging substrate comprises a substrate and two isolated rings; the substrate comprises a bonding surface and a bottom surface; the two isolated rings extend along the direction perpendicular to the substrate and penetrate the bonding surface and the bottom surface, and define a movable cavity in the middle of the bonding surface with a top surface lower than the bonding surface, and a movable cavity ring surrounding the two isolated rings; the bonding surface around the movable cavity ring comprises a bonding ring; between the top of any isolated ring and the bonding surface surrounding the isolated ring, an anti-overflow isolation groove ring is provided for isolation; the bonding surface around the anti-overflow isolation groove ring comprises a solder pad; adjacent anti-overflow isolation groove rings are connected through the movable cavity in the middle. At least one packaging substrate with excellent electrical isolation performance and good thermal matching can be provided, and the signal crosstalk caused by excessive parasitic capacitance can be avoided while realizing the vertical interconnection of multiple independent signals.

The application discloses a display module, comprising: a display area and a non-display area, and the non-display area comprises a visible area and a light shielding area, and the visible area is located between the display area and the light shielding area; wherein the display module comprises a plurality of first wires arranged at intervals, the first wire comprises a first part located in the visible area, a plurality of first hollow areas are arranged on the first part, and a first gap between at least part of two adjacent first parts extends in a snake shape. In the above manner, the application can reduce the probability of exposure of the first wire from the visible area and improve the user visual effect.