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Ferroelectric memory and operating method therefor

A technology of ferroelectric memory and ferroelectric capacitor, applied in static memory, digital memory information, information storage and other directions, can solve problems such as information loss

Inactive Publication Date: 2008-11-12
OL SECURITY LIABILITY CO
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

Therefore, when executing something like Figure 11 When the writing operation of the shown simplified matrix ferroelectric memory is continuously applied to the unselected cell 300 with a voltage of 1 / 3Vcc in the same direction, as in the above case, when the so-called disturbance occurs, the information (charge amount) in the unselected cell 300 is not selected. will be lost

Method used

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  • Ferroelectric memory and operating method therefor
  • Ferroelectric memory and operating method therefor
  • Ferroelectric memory and operating method therefor

Examples

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no. 1 example

[0052] FIG. 1 is a circuit diagram showing the overall structure of a simplified matrix ferroelectric memory according to a first embodiment of the present invention. In the simplified matrix ferroelectric memory of the first embodiment, a plurality of memory cells 1 are arranged in a matrix form to form a memory cell array 50 (for ease of illustration, only nine memory cells 1 are shown in FIG. 1 ). The ferroelectric capacitor 2 forms the first terminal of the memory cell 1 connected to the word lines WL0 - WL2 , and the second terminal connected to the bit lines BL0 - BL2 . Its cross-sectional structure and Figure 10 The memory cell 1 of this simplified matrix ferroelectric memory similar to the shown conventional simplified matrix ferroelectric memory has a ferroelectric layer formed between bit lines BL0-BL2 and word lines WL0-WL2 intersecting therewith.

[0053] The word lines WL0 - WL2 are connected to the row decoder 31 , and the bit lines BL0 - BL2 are connected to t...

no. 2 example

[0071] 6 is a circuit diagram showing the overall structure of a simplified matrix ferroelectric memory according to a second embodiment of the present invention. The ferroelectric memory of the second embodiment has a structure in which a paraelectric capacitor is connected in series with the ferroelectric capacitor of each storage unit, which is similar to the structure of the simplified matrix ferroelectric memory of the first embodiment.

[0072] According to the second embodiment, each memory cell 21 forming the memory cell array 60 is constituted by a ferroelectric capacitor 22 and a paraelectric capacitor 23 in which the ferroelectric capacitor 22 is connected in series. At this time, the voltage applied to the simple matrix ferroelectric capacitor 22 is inversely proportional to the capacitance ratio of the ferroelectric capacitor 22 to the paraelectric capacitor 23 . For example, when the capacitance ratio of the ferroelectric capacitor 22 and the paraelectric capacit...

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Abstract

A ferroelectric memory capable of avoiding disturbance in non-selected cells is obtained. This ferroelectric memory comprises pulse application means for applying pulses having a prescribed pulse width causing sufficient polarization inversion when applying a high voltage to the ferroelectric capacitors while hardly causing polarization inversion when applying a low voltage to the ferroelectric capacitors to the memory cells. The ferroelectric memory applies a pulse of a high voltage having the aforementioned prescribed pulse width to a selected memory cell while applying a pulse of a low voltage having the aforementioned prescribed pulse width to non-selected memory cells in at least either data writing or data reading. Thus, writing or reading is performed on the selected memory cell, while polarization inversion is hardly caused in the non-selected memory cells. Consequently, disturbance can be avoided in the non-selected memory cells.

Description

technical field [0001] The present invention relates to ferroelectric memories and methods of operation thereof, and more particularly to ferroelectric memories including ferroelectric capacitors and methods of operation thereof. Background technique [0002] Recently, a ferroelectric memory is regarded as a high-speed nonvolatile memory requiring low power consumption, and thus such a ferroelectric memory is under active research and development. [0003] Figure 7 is a representative circuit diagram of the most commonly used common ferroelectric memory, Figure 8 is corresponding to Figure 7 cutaway view. refer to Figure 7 and 8 , in a conventional structure, the element isolation region 102 is formed in a predetermined region on the surface of the semiconductor substrate 101 . On a certain element formation region enclosed by the element isolation region 102, source / drain regions 103 and 104 are formed at predetermined intervals. On the channel region between the so...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G11C11/22H01L21/8246H01L21/8247H01L27/105H01L29/788H01L29/792
CPCG11C11/22
Inventor 松下重治
Owner OL SECURITY LIABILITY CO