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Low frequency clock signal generating method and low frequency cloc ksignal generator

A low-frequency clock and signal generation technology, applied in the IT field, can solve the problems of high difficulty in implementation and high cost of low-frequency clock signals, and achieve the effect of reducing the difficulty of purchasing cash, reducing the cost of implementation, and reducing timing devices

Inactive Publication Date: 2009-01-28
NEW H3C TECH CO LTD
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AI Technical Summary

Problems solved by technology

[0008] The purpose of the present invention is to provide a low-frequency clock signal generation device and a low-frequency clock signal generation method to solve the problem of the need to add additional devices to generate low-frequency clock signals when the frequency division factor is not an integer in the prior art, or save a lot of time compared with traditional methods CPLD resources, which in turn make the generation of low-frequency clock signals costly and difficult to implement technical defects

Method used

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  • Low frequency clock signal generating method and low frequency cloc ksignal generator
  • Low frequency clock signal generating method and low frequency cloc ksignal generator
  • Low frequency clock signal generating method and low frequency cloc ksignal generator

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Embodiment Construction

[0054] The present invention will be described in detail below in conjunction with the accompanying drawings.

[0055] The present invention utilizes programmable logic devices with programmable characteristics, and the period T of the low-frequency clock signal output according to needs 0 and the period of the source clock signal T s Determine the multiplier N 1 and the frequency division number N 2 , where N 1 for 2 n And n is 0 or a natural number, and the frequency of receiving the source clock pulse signal is expanded to N 1 Reduced to N after doubling 2 times, or reduce the frequency of receiving the source clock pulse signal to N 2 times and then expanded to N 1 times to generate a period T 0 The source clock pulse signal, so as to overcome the technical defect that when the frequency division factor is non-integer, additional devices are required to generate low-frequency clock signals.

[0056] The low-frequency clock signal is generated by the joint action o...

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Abstract

A method for generating low frequency clock signal includes confirming frequency multiplication number N1 and frequency division number N2 according to low frequency clock signal cycle T0 and source clock pulse signal TS ; receiving signal Ts and enlarging it to be clock signal of frequency N1 / TS ; narrowing clock signal of frequency N1 / TS to be 1 / N2 then outputting it for obtaining low frequency clock signal with cycle T0 .The device for generating this low frequency clock signal is also disclosed .

Description

technical field [0001] The invention relates to IT fields such as communications and networks, and in particular to a device and method for generating a low-frequency clock signal. Background technique [0002] Low-frequency clock signals are widely used in IT industries such as communications and networks, such as the lighting of system indicators and the control of watchdogs. see figure 1 , which is a schematic structural diagram of a low-frequency clock signal generating device in the prior art. It includes a clock source 1 and a CPLD (Programmable Logic Device) 2 . The clock source 1 is usually a crystal oscillator, which generates a high-frequency clock signal with a frequency of tens of megahertz (HZ). The CPLD2 needs to divide the frequency of the high-frequency clock signal to obtain a low-frequency clock signal whose frequency meets the requirements. [0003] The existing low-frequency clock signal generation method is that CPLD2 first calculates the input high-...

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H03B19/00H03L7/18G06F1/04
Inventor 蒋玉峰邓兴
Owner NEW H3C TECH CO LTD
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