Block based design methodology with programmable components

Abstract

A method for designing a circuit block includes the steps of selecting a plurality of pre-designed circuit blocks to be used to design the circuit system, at least one of said circuit blocks being programmable; collecting data reflecting the experience of the designer regarding the pre-designed circuit blocks, the designer's experience being adaptable to a processing method; accepting or rejecting a design of the circuit system in a manner based on the designer's experience data and acceptable degree of risk; upon acceptance, forming block specifications containing criteria and modified constraints for each of the circuit blocks (FEA); and, upon acceptance, forming block specifications for deploying the circuit blocks on a floor plan of a chip, in compliance with the criteria and modified constraints without changing the selected circuit block and the processing method.

Description

technical field [0001] The present invention relates generally to integrated circuit ("IC") component design, and more particularly to the design of systems that reuse predesigned circuit blocks. Background technique [0002] In recent years, continuous improvements in silicon processing technology have dramatically lowered prices and greatly increased the performance and functionality of integrated circuit components, thereby stimulating the development of electronics manufacturing and information processing industries. In turn, these rapidly growing industries are placing demands on IC design system developers to design faster and cheaper components. As a result, the design industry is now undergoing drastic changes, including: [0003] (1) Chip designs become larger and more complex. For example, in 1977, a typical integrated circuit contained 100,000 to 500,000 gates. In 1998, a typical part contained one to two million gates. Technologies from 1999 and later show a ...

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Problems solved by technology

[0028] Second, it must face the difficulty of new defect types and levels of defects due to technology scaling, new complexities in mixed-signal and mixed-technology designs, increases in I / O counts, and new packaging technologies

[0029] Third, it must face the difficulty of integrating IP blocks that inherently lack a unified structural inspection model

However, trying to include programmable circuits as part of a reusable circuit design presents other challenges

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