Production method of high voltage MOS transistor

Abstract

A method for manufacturing a high-voltage MOS transistor, comprising the following steps: forming an auxiliary active region pattern to be exposed at the junction of an active region pattern to be exposed and an isolation region pattern to be exposed; The pattern and the pattern of the auxiliary active area to be exposed are transferred to the silicon substrate to form the active area, isolation area and auxiliary active area; the first p-type ion implantation is performed in the silicon substrate of the active area and the auxiliary active area ; Form a photoresist layer on the silicon substrate, and after exposure and development, form an opening on the photoresist layer; use the photoresist layer as a mask to conduct a second p Type ion implantation; forming a gate oxide layer on the silicon substrate in the active area and the auxiliary active area. After the above steps, the same type of ion implantation is performed twice in the auxiliary active region to increase the threshold voltage of the auxiliary active region, and the double peak phenomenon does not appear, thereby reducing the power consumption of the device and increasing the stability of the device operation.

Description

technical field [0001] The invention relates to a semiconductor manufacturing process, in particular to a method for manufacturing a high-voltage MOS transistor, in particular to a method for preventing double-peak effects in the process of manufacturing a high-voltage MOS transistor. Background technique [0002] In semiconductor technology, even though the device size continues to shrink, it is still desirable to improve the performance of transistors, and it is also desirable to manufacture integrated circuit semiconductor devices that combine low, high, and medium voltage applications. For example, integrated circuits (hereinafter referred to as driver ICs) used to drive image sensors, LCDs, and printed magnetic heads, etc., are composed of ICs with strong withstand voltage between the drain and source that operate at a power supply voltage above +V. The drive output unit of the high-voltage MOS transistor and the logic unit of the control drive output unit of the low-vo...

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Problems solved by technology

[0010] The problem to be solved by the present invention is to provide a method for manufacturing a semiconductor transistor, which prevents gate oxidation from being easily caused during the formation of the gate oxide layer due to the fact that the gate oxide layer of the high-voltage MOS transistor is relatively thick and is affected by the chamfering of the shallow trench isolation region. The edge part of the layer is thinner than the middle part, resulting in a lower threshold voltage at the edge of the gate oxide layer, resulting in a double peak phenomenon, resulting in high power consumption of the device and poor stability of the device.

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