Method for achieving uniform chemical mechanical polishing in integrated circuit manufacturing

Abstract

A method for planarizing a surface in an integrated circuit manufacturing process provides a first film of a first material over a non-uniform surface, such as a surface including isolation trenches. The first material includes, for example, a polysilicon layer to be used to form floating gates in a non-volatile memory integrated circuit. A second film, which is a sacrificial film formed using a second material, such as silicon oxide, is then provided over the first film. Partial removal of the second film is carried out using chemical mechanical polishing until a portion of the first film is exposed using a first slurry that is selective to the first material. Thereafter, the remaining layer of the second film is removed, along with planarization of the surface, using a second slurry that is less selective, i.e., has a selectivity of the first film to the second film that is less than a predetermine value (e.g., 2:1). The invention can greatly reduce the heterogeneity in existing technology via first chemical mechanical polishing work using high selective paste and second chemical mechanical polishing work using relative low selective paste.

Description

technical field [0001] The present invention relates to a method for planarizing a surface by using chemical mechanical polishing (CMP) in the manufacture of integrated circuits, in particular to a method for carrying out the first chemical mechanical polishing (CMP) step through highly selective slurry and relatively low-selective slurry to carry out the process of the second chemical mechanical polishing (CMP) step, and can greatly reduce the method of planarizing a surface in the integrated circuit manufacturing process of the non-uniformity existing in the prior art (METHOD FORACHIEVING UNIFORM CHEMICAL MACHNICAL POLISHING IN INTEGRATED CIRCUITMANUFACTURING). Background technique [0002] In integrated circuits, such as floating gates (in this article, the gate is the gate, hereinafter referred to as the gate) non-volatile (non-volatile is non-volatile, hereinafter referred to as non-volatile) In a memory (memory, storage medium, memory, internal memory, etc., hereinaft...

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Problems solved by technology

[0006] The purpose of the present invention is to overcome the defects of the existing method of chemical mechanical polishing in the integrated circuit manufacturing process, and provide a new method for planarizing a surface in the integrated circuit manufacturing process. The technical problem to be solved is The process of carrying out the first chemical-mechanical polishing (CMP) step through the high-selectivity slurry and the second chemical-mechanical polishing (CMP) step with the relatively low-selectivity slurry can greatly reduce the cost of the prior art. the existence of non-uniformity, it is very suitable for practical

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