Semiconductor component and method for manufacturing semiconductor component

Abstract

The present invention relates to a semiconductor component and a method for manufacturing the same. The semiconductor component comprises a semiconductor body, which includes a substrate of a first conducting type, a buried semiconductor layer of a second conducting type being arranged on the substrate, a functional cell semiconductor layer of a third conducting type being arranged on the buried semiconductor layer. The functional cell semiconductor layer provides at least two semiconductor functional cells being arranged landscape orientation in a row. The buried semiconductor layer is part of at least one semiconductor functional cell. The semiconductor functional cells are electrically insulated with each other by means of the functional semiconductor layer, the buried semiconductor layer and the separating structure of the substrate. The separating structure comprises at least a trench and a conducting contact with the substrate, the contact is electrically insulated with the functional cell semiconductor layer and the buried layer by means of at least one trench.

Description

technical field [0001] One aspect of the invention relates to a semiconductor component having a semiconductor body comprising a substrate of a first conductivity type, a buried semiconductor layer of a second conductivity type arranged on the substrate, a buried semiconductor layer arranged on the buried semiconductor layer A functional unit semiconductor layer of a third conductivity type on the upper surface, and a contact from the surface of the semiconductor body to the substrate, in which at least two semiconductor functional units arranged laterally side by side are arranged. The buried semiconductor layer is part of at least one semiconductor functional unit. The semiconductor functional units are electrically insulated from each other by an isolation structure, and the isolation structure passes through the functional unit semiconductor layer, the buried semiconductor layer and the substrate. Background technique [0002] The lateral space requirements of semicondu...

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Problems solved by technology

[0005] However, known isolation using trenches as shown in FIG. 1B does not provide the possibility of contact with the substrate as is the case with diffusion isolation described with reference to FIG. 1A

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