Check patentability & draft patents in minutes with Patsnap Eureka AI!

Chip encapsulation structure

A chip packaging structure and chip packaging technology, which are applied in the directions of printed circuits, electrical components, and electrical solid devices connected to non-printed electrical components, can solve problems such as poor fixing, deformation of the chip packaging structure 100, poor coplanarity, etc. problem, to achieve good fixing effect, prevent falling off, and increase the effect of contact area

Active Publication Date: 2008-01-09
ADVANCED SEMICON ENG INC
View PDF0 Cites 7 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] However, poor coplanarity of the pins 124a, poor flatness of the substrate 110, or thermal stress may cause deformation of the chip package structure 100, especially the high temperature of the reflow solder may cause the substrate 110 to warp. , thus affecting the assembly reliability of the chip package structure 100
Also because the contact surface of the pin 124a of the chip package structure 100 and the solder bump 140 is only at the opening 112a, it is easy to make the solder bump 140 poorly fixed to the pin 124a, thereby reducing the reliability of the chip package structure 100.

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Chip encapsulation structure
  • Chip encapsulation structure
  • Chip encapsulation structure

Examples

Experimental program
Comparison scheme
Effect test

no. 1 example

[0035] FIG. 2 is a cross-sectional view of the chip package structure in the first embodiment of the present invention. What needs to be explained first is that the circuit board has two contacts and two first openings as an example below, but the present invention is not limited thereto, and those skilled in the art can also configure only one contact on the circuit board and a first opening, or more than two contacts and the first opening are arranged.

[0036] Please refer to FIG. 2 , the chip package structure 200 includes a circuit board 210 , a solder mask 220 and a chip package 230 . The solder resist layer 220 covers the circuit board 210 , wherein the solder resist layer 220 may be formed on the circuit board 210 by screen printing, spray printing or coating. The solder resist layer 220 has a first opening 222 , and the first opening 222 exposes the contacts 212 on the circuit board 210 .

[0037] The chip package 230 includes a chip 232 and a lead frame 234 , and t...

no. 2 example

[0041] FIG. 4A is a top view of the embedded part in the second embodiment of the present invention, and FIG. 4B is a side view of the embedded part in FIG. 4A. In the second embodiment and the first embodiment, the same or similar element numbers represent the same or similar elements. The second embodiment is substantially the same as the first embodiment, and the differences between the two embodiments will be described in detail below, and the similarities will not be repeated.

[0042] Please refer to FIG. 4A and FIG. 4B , the difference between the second embodiment and the first embodiment is that the embedding portion 310 b further has a second opening 312 b. The second opening 312b can be formed by etching, or by forming the second opening 312b at the same time when the embedding portion 310b is punched, and its shape can be triangular, semicircular or semielliptical. The solder bump 240 can protrude from the second opening 312b to form the protruding portion 242, wh...

no. 3 example

[0044] Fig. 5A is a top view of the embedded part in the third embodiment of the present invention, and Fig. 5B is a side view of the embedded part in Fig. 4A. Please refer to FIG. 5A and FIG. 5B. In this embodiment, in addition to the concave cup structure shown in FIG. 4B, the embedded part can also be an arched structure as shown in FIG. 5B, and a hollow can be formed around the embedded part 310c Shaped second opening 312c and third opening 314c, while the pin 300 only retains the connecting portion 316c to be formed between the second opening 312c and the third opening 314c, and finally the connecting portion 316c is stamped into the required concave shape structure.

[0045] The shapes and manufacturing methods of the second opening 312c and the third opening 314c can refer to the above-mentioned second opening 312b, and will not be repeated here. In addition, the connecting portion 316c may also have other shapes. For example, the second opening and the third opening ...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention is concerned with the chip packaging structure, includes the circuitry board, the weld proofed layer and the chip packaging body. The surface of the circuitry board has at least one meeting point, and with the weld proofed layer covered on, which the weld proofed layer has at least one of the first hatch for unveiling the connecting point. The chip packaging body setting on the circuitry board includes the chip and the conductor frame that has at least one of the pin to connect the chip electrically. The embedding party of the pin is opposite the connecting point and sagging within the first hatch. It can make the connection of the pin of the chip packaging structure and the connecting point more stable by filling in solder piece into the first hatch for connecting with the embedding party.

Description

technical field [0001] The invention relates to a chip package structure, in particular to a chip package structure carried by a lead frame. Background technique [0002] In the manufacture of integrated circuits, chips (die) are obtained through steps such as wafer manufacturing, forming integrated circuits, and cutting wafers (wafer sawing). After the integrated circuits of the wafer are manufactured, the chips formed by dicing the wafer can be electrically connected to a carrier. The carrier can be a leadframe or a substrate, and the chip can be electrically connected to the carrier by wire bonding or flip chip bonding. If the chip and the carrier are electrically connected by wire bonding, the process step of filling the encapsulant is performed to form a chip package. [0003] FIG. 1 is a cross-sectional view of a conventional chip packaging structure. Please refer to FIG. 1 , the chip package structure 100 includes a substrate 110 and a chip package 120 . The chip ...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
IPC IPC(8): H01L23/488H05K1/18
CPCH01L2224/16245H01L2224/48091H01L2224/48247
Inventor 廖国成
Owner ADVANCED SEMICON ENG INC
Features
  • R&D
  • Intellectual Property
  • Life Sciences
  • Materials
  • Tech Scout
Why Patsnap Eureka
  • Unparalleled Data Quality
  • Higher Quality Content
  • 60% Fewer Hallucinations
Social media
Patsnap Eureka Blog
Learn More

Browse by: Latest US Patents, China's latest patents, Technical Efficacy Thesaurus, Application Domain, Technology Topic, Popular Technical Reports.

© 2025 PatSnap. All rights reserved.Legal|Privacy policy|Modern Slavery Act Transparency Statement|Sitemap|About US| Contact US: help@patsnap.com