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Method and system for capturing and storing bare nucleus exception in multi-core processor

A multi-core processor, abnormal technology, applied in electrical digital data processing, general-purpose stored program computers, instruments, etc., can solve the problems of inability to save abnormal information, unable to capture abnormal information, etc., to achieve good economy, improve satisfaction, reduce Impact and effect of user complaints

Inactive Publication Date: 2008-05-07
ZTE CORP
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  • Abstract
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  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] The technical problem solved by the present invention is to provide a method for capturing and storing exceptions when an exception occurs in a bare core in a multi-core processor, which solves the problem that the exception information cannot be captured and stored when an exception occurs in a bare core that does not run an operating system in a multi-core processor to memory problem

Method used

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  • Method and system for capturing and storing bare nucleus exception in multi-core processor
  • Method and system for capturing and storing bare nucleus exception in multi-core processor
  • Method and system for capturing and storing bare nucleus exception in multi-core processor

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Embodiment Construction

[0045] The specific embodiment of the present invention will be described in further detail below in conjunction with the accompanying drawings.

[0046] As shown in Figure 1, it is a system diagram of bare core exception capture and storage in a multi-core processor. The control plane core runs a complete commercial operating system, and an abnormal guardian task is created on the operating system when the control plane core is running. After the data surface core runs, the initialization process of exception handling is carried out. By setting the exception vector table, the exception service routine is hooked and the exception handling task is created. Exception daemon tasks create shared queues between control plane and data plane cores when they run. in,

[0047] The exception guard task is used to create a shared queue between the control plane core and the data plane core during runtime, and is used to periodically poll the shared queue, and if an abnormal message is ...

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Abstract

A method and system for capturing and storing the exception of bared core in multi-cores processor. The method comprises the steps of: the control plane core creating an exception guarding task, the exception guarding task running and creating the shared queue between the control plane core and the data plane core; the data plane core initializing the exception processing after running, setting an exception vector table, hooking the exception service routine by setting the exception vector table, and creating an exception processing task; after the exception occurs in the data plane core, the processor capturing the exception information, calling back the exception service routine to take over the processing, releasing an exception processing semaphore to inform the exception processing task; after the exception processing task obtains the semaphore, saving the exception information, processing it and then writing the exception information and the processed result into a shared queue; the exception guarding task polling the shared queue regularly, when discovering the exception information in the queue, fetching it to write in the memory.

Description

technical field [0001] The invention relates to the field of processors, in particular to a method and system for capturing and storing exceptions when a bare core of a multi-core processor is used in the communication field when an exception occurs. Background technique [0002] With the advent of the information age and the emergence of various new technologies and services, users have higher and higher bandwidth requirements for both mobile communication and data communication. In order to meet the high bandwidth requirements of individual users, operators require mobile communication equipment And data communication equipment has large capacity, high access and high processing performance. In order to meet the requirements of large capacity, high access and high processing performance, a large number of multi-core processors with high processing capabilities have been used in mobile communication devices and data communication devices. [0003] A multi-core processor is...

Claims

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Application Information

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IPC IPC(8): G06F11/36G06F9/28G06F15/76
CPCG06F11/3636G06F9/4812G06F2209/481
Inventor 郭树波杨骐周立超
Owner ZTE CORP
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