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Encrypting method and chip for anti-attack standard encryption criterion

A technology of encryption chip and encryption method, which is applied in the field of information security

Inactive Publication Date: 2008-06-11
SHANGHAI AISINOCHIP ELECTRONICS TECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Traditional DES is fragile in front of DPA, and the probability of successful attack in a complete test environment is very high. Therefore, it is necessary to redesign DES that can prevent DPA attacks. This paper presents a DES that can resist DPA attacks on the algorithm Mask technology

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  • Encrypting method and chip for anti-attack standard encryption criterion
  • Encrypting method and chip for anti-attack standard encryption criterion
  • Encrypting method and chip for anti-attack standard encryption criterion

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Embodiment Construction

[0030] Embodiments of the present invention will be described in further detail below in conjunction with the accompanying drawings, but the present embodiments are not intended to limit the present invention, and all similar structures, methods and similar changes of the present invention should be included in the protection scope of the present invention.

[0031] The embodiment of the present invention is a high-speed encryption chip design for preventing bypass attacks (especially DPA attacks)—DES_Mask IP. The designed chip not only adopts the standard algorithm DES of NIST to prevent DPA attacks, but also has the characteristics of high speed, which can encrypt messages of any length, and the key used is 64bits (including parity bits). The whole chip is set as DES_Mask IP, and the encryption engine is set as DES_Mask. The design of this chip (or IP) has three key points: masking the plain ciphertext, masking the key and generating a new random number based on the random n...

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Abstract

The invention provides an attack-proof DES encryption method and an encryption chip, relating to the information security technical field. The encryption chip comprises a memory interface module for the chip input and output, the data bit transformation and comprising each register and an encryption engine DES Mask of the DES decryption operation for realizing the DPA attack proof; an output signal and an input signal of the encryption engine are respectively connected to a corresponding register. The encryption method comprises the following steps that: 1) in the process of clear-text input, a uniform random number of x is used to Mask; 2) the standard DES operation is completed including the XOR operation of a round key generated by the mask of the Key of a Mask Key and the operation of the replacement of a modified S-box; 3) when the result is outputted, the calculation result of the DES is obtained when the uniform random number of x is XOR. The invention can effectively avoid the SPA attack, the DPA attack and the high-order DPA attack.

Description

technical field [0001] The invention relates to information security technology, in particular to an anti-attack DES (Standard Encryption Standard) encryption method and encryption chip technology. Background technique [0002] With the continuous popularization of the network and the increasing degree of social informatization, the importance of information security has gradually become prominent. As one of the most powerful weapons in information security, encryption is playing an important role. Currently commonly used cryptographic algorithms can be roughly divided into two categories: symmetric algorithms represented by DES (Standard Encryption Standard) and AES (Advanced Encryption Standard) and RSA (a public key encryption method) and ECC (Elliptic Curve Cryptography) as representatives. Represents an asymmetric algorithm. In data communication, symmetric encryption is widely used because of its fast encryption speed and simple implementation method. The DES encryp...

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Application Information

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IPC IPC(8): H04L9/06
Inventor 周玉洁陈志敏秦晗谭咏伟
Owner SHANGHAI AISINOCHIP ELECTRONICS TECH
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