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Grid electrode and method for forming same

A gate electrode and patterning technology, applied in the manufacturing of circuits, electrical components, semiconductor/solid-state devices, etc., can solve the problems of high process cost and complex gate electrode process, and achieve the effect of simplifying the process

Inactive Publication Date: 2010-12-22
SEMICON MFG INT (SHANGHAI) CORP
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  • Description
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  • Application Information

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Problems solved by technology

[0007] The problem solved by the present invention is that the process of forming the gate electrode in the prior art is relatively complicated, and the process cost is relatively high

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  • Grid electrode and method for forming same

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Embodiment Construction

[0027] The essence of the present invention is to form a doped polysilicon layer, a metal tungsten layer, a tungsten nitride layer and a refractory metal layer on the gate dielectric layer; then the polysilicon layer, the metal tungsten layer and the tungsten nitride layer are annealed; after annealing, the reaction A tungsten silicide layer, a tungsten nitride silicide layer, and a remaining tungsten nitride layer are formed. In this embodiment, the metal tungsten layer, tungsten nitride layer, and refractory metal layer are all prepared in a PVD device, and other devices such as chemical vapor deposition (CVD) devices can also be used to prepare them. Many limits the scope of protection of the present invention; in this embodiment, the annealing is the formation of a source / drain diffusion region activation implantation in the semiconductor substrate in the subsequent formation of the first annealing process for selectively oxidizing both sides of the doped polysilicon In the...

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Abstract

A method for forming a grid electrode comprises the following steps: a semiconductor substrate is provided and a gate dielectrics layer, a doped polycrystalline silicon layer, a metal tungsten layer, a tungsten nitride layer and a refractory metal layer are formed on the semiconductor substrate in order; the semiconductor substrate is annealed and then the metal tungsten layer and the tungsten nitride layer reacts with the doped polycrystalline silicon layer to generate a tungsten silicide layer, a tungsten silicide nitride layer and the residual tungsten nitride layer. The adoption of the grid electrode generated by the invention can have an effect of preventing the refractory metal layer and the tungsten nitride layer from being dispersed towards the doped polycrystalline silicon layer and simultaneously the interfacial resistance of the formed grid electrode is smaller as the generated tungsten silicone and the tungsten silicide nitride have less thickness.

Description

Technical field [0001] The present invention relates to the field of semiconductor technology, in particular to a gate electrode and a method for forming the same. Background technique [0002] In large-scale integrated circuits (LSI), in order to form low-resistance gate electrodes to meet the needs of higher operating speeds, a large number of gate electrode structures have been developed. For example, the earliest use of metal aluminum on the gate dielectric layer as the gate For the electrode electrode, metal aluminum has a lower resistance, however, this metal gate electrode has the disadvantage of lower thermal resistance in a higher temperature range. Therefore, this kind of metal gate electrode is not suitable for use in a self-aligned structure, in which the metal gate electrode must be formed before high temperature heat treatment. [0003] Later, people formed doped polysilicon (DOPOS) on the gate dielectric layer as the silicon gate electrode. This silicon gate electro...

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/28H01L21/336
Inventor 向阳辉荆学珍
Owner SEMICON MFG INT (SHANGHAI) CORP
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